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Today, we will talk about the bond market.

On August 17, the yield on the 30 year US Treasury bond touched 5.31%.

That is the highest level in 19 years. The last time America paid this much to borrow money for three decades, the iPhone did not exist.

The consensus reaction was immediate and unanimous: risk off, sell tech, and sell Asian chip names hardest of all. Higher discount rate, lower valuations, and the most rate sensitive corner of the market takes the deepest cut. Everybody ran the same trade.

I think the consensus has the mechanism right and the destination completely wrong.

Because almost nobody is asking why that yield went up in the first place. And the answer is not inflation. It is not even mainly the deficit.

It is AI.

The AI buildout is no longer being paid for out of Big Tech’s cash pile. It is being paid for with borrowed money, on a scale that now competes directly with the US government for the world’s savings. Which produces the strangest feedback loop in markets right now, and the one this edition is named after.

AI borrows to build. The borrowing lifts long term interest rates. Higher rates lower the present value of every future profit, including AI’s own.

The boom is raising the very number the market uses to discount the boom.

That is the loop. It is not a metaphor, it is an accounting identity. And if AI is financing its own devaluation, then somewhere in that circle there has to be a party that receives the cash without ever paying the discount rate.

Somebody is on the collecting end. This edition is about finding them.

Here is the approach of this piece.

The consensus says: yields up, tech down, Asian chip names down hardest. I am going to show you why that reasoning is right about the mechanism and wrong about the destination. I will show you how AI became a bond market story, how that story feeds back into AI’s own valuation, and why the loop has an exit door that opens onto the Pacific. I am going to walk you through what is actually driving the long end of the US yield curve, in first principles, in plain language. I will explain the one concept that decides who gets hurt and who does not, which is duration. And then I will show a few companies that I believe this exact rate regime is quietly, mechanically, arithmetically selecting as winners.

They are not household names. One of them controls over 70% of a market that literally cannot function without it. The other has an order backlog worth more than two years of revenue, signed with customers who cannot substitute away.

Let me be very clear about what this article is for

Because I do not want you to read three thousand words of bond market mechanics and wonder what the point was.

This is not an article about why yields went up.

There are already fifty of those. They are mostly well written and they all end in the same place, which is a shrug and a sentence about uncertainty. Understanding the mechanism is table stakes. It is the first third of the job, and if that is all you get, you have learned something interesting and you can do nothing with it.

This is an article about who gets paid inside the loop.

Let me restate the loop, because everything hangs off it.

• AI needs enormous amounts of physical infrastructure

• That infrastructure is now financed with debt rather than cash

• That debt competes with the US Treasury for the same finite pool of global savings

• The competition pushes long term yields up

• Higher yields raise the discount rate applied to all future profits

• Including the future profits of AI itself

Round and round. The build finances the melt.

Now, the loop is a closed circle only if you are the one borrowing. If you are the one selling shovels into it, the circle breaks. You take the cash and you never touch the discount rate. You are inside the boom without being inside the loop.

That is the trade. And here is the thesis, stated as plainly as I can put it.

High long term yields are not simply bad news. They are not a market wide verdict. They are a sorting machine. They take the entire investable universe and they sort it, ruthlessly and mathematically, into two piles: assets whose value sits far in the future, and assets whose value sits in a contract signed this year.

Pile one gets destroyed. Pile two barely notices.

And here is the part almost nobody has said out loud yet, which is the reason this edition exists:

Pile two is overwhelmingly Asian.

The companies that get selected by this rate regime are, disproportionately, Korean and Japanese industrial suppliers. Not by accident. By structure.

Think about who actually sits in each pile.

• The American side of the AI trade owns the narrative. Model labs. Neoclouds. Platforms monetising in 2032. Enormous terminal values, financed with 30 year bonds at 6.4%.

• The Asian side of the AI trade owns the inventory. The machines. The metal. The equipment that has to physically exist before a single token gets generated. Booked orders. Cash on delivery. Net cash balance sheets.

When money was free, the market paid a premium for the narrative and treated the inventory as a boring cyclical afterthought.

Money is not free anymore.

So the whole point of this piece is to take you from “yields are up, that’s scary” to something far more useful: a repeatable framework for identifying which companies a high rate world actively selects, and then two specific Asian names that pass that filter today.

Every section from here builds toward that.

• Part 2 tells you what really pushed yields up, because the cause determines who suffers. If it were inflation, everyone suffers equally. It is not inflation.

• Part 3 covers Bessent’s intervention, because it tells you whether this is a spike or a floor. Winners only matter if the regime lasts.

• Part 4 gives you the arithmetic of duration, which is the actual sorting machine.

• Part 5 shows that the American bond sell off and the bid for Asian assets are literally the same event.

• Parts 6 and 7 cover the damage so far, and why this is not yet a crisis.

• Part 8 turns to what high rates actually do to the AI buildout, and why expensive money concentrates demand onto the physical bottlenecks rather than destroying it.

• Part 9 builds the filter: the three conditions that decide whether an industry gets paid or punished.

• Parts 10 and 11 run all seven layers of the AI stack through it. Two pass, five fail.

• Part 12 applies a company level filter inside the winning layers and gives you six names.

If you only remember one line from this edition, make it this one.

The market has fully priced the melt and priced almost none of the build. The melt is American. The build is Asian.

1. The number that started everything

Let’s start with the fact, and then look at the shape of it.

On the week of August 17, the yield on the 30 year US Treasury bond went above 5.33%, while the 10 year traded near 4.73% and the two year sat around 4.19%.

Quick vocabulary check, because this matters and a lot of people get it wrong.

This is not a record. Not even close. Long term US yields were far higher in the 1980s. If you see a newsletter calling this an all time high, close the tab. What it is, is a 19 year high.

The shape of the move

Now look at the whole year, because the endpoints hide more than they reveal.

This is the 30 year US Treasury yield, daily, from February 26 to August 26, 2026. It starts at 4.67%. It bottoms at 4.64% on February 27. It peaks at a 19 year high of 5.31% on August 17. And as of Wednesday morning it sits at 5.18%.

There are four distinct movements in that line and each one is a different story.

• February to early May: the grind up. From 4.64% to roughly 5.18%. This is the deficit repricing. Slow, relentless, no single headline.

• May to late June: the fade. Back down toward 4.86%. The market decides it has overreacted.

• Late June to August 17: the vertical part. From below 5% to 5.31% in about seven weeks. This is where the article lives.

• August 17 to today: the retreat. Down 13 basis points to 5.18%. And this last movement is entirely man made, which we get to in part 3.

Here is the number that frames the whole year. The 30 year was around 5.2% on the Wednesday of the intervention, up from roughly 4.63% just before the Iran war.

57 basis points. That is what the war added to the cost of borrowing money for thirty years.

And here is what is not on the chart

For most of that climb, inflation expectations barely moved at all.

The 30 year closed one week at 5.26%, the highest since June 2007, and it did that despite mild readings on both consumer and wholesale inflation, which is unusual because long term yields normally fall when inflation stops being scary.

Read that again.

Inflation data came in soft. Yields went up anyway.

That is the whole mystery, and solving it is the whole article.

A Treasury bond is just a loan to the US government. You give Washington money, Washington pays you interest, and at the end you get your money back. Bond prices and bond yields move in opposite directions, like a seesaw. If the price falls, the yield rises. So a rising yield means one thing above all others: fewer people want to buy the thing at the old price.

In one week alone, investors demanded the highest yields in roughly two decades to absorb about 67 billion dollars of long term US government bonds.

Think of the Treasury market as a fruit stand. Every week the government shows up with crates of apples. For twenty years the buyers were reliable: pension funds, insurers, foreign central banks. They took the crates without arguing about price much. Now the government is showing up with three times as many crates, a new fruit vendor has set up next door selling much sweeter apples, and the regular customers are haggling.

The haggling is the yield.

What the long bond is actually saying

“We do not necessarily expect more inflation. We simply want more money to lend Washington our capital for thirty years.”

So what actually pushed the line up? That is part 2.

But hold one thought first, because it is the hinge of the entire piece.

A rising cost of capital does not vaporise money. It moves it, from the people who need capital to the people who supply goods. Every dollar of AI capex is a cost line for the borrower and a revenue line for the manufacturer, and only one of those two has to care what the 30 year yield is doing.

And every single asset on the planet now has to compete with that demand. Including, and this is the part that matters, every listed company in Seoul and Tokyo.

The question is not whether they get repriced. They all get repriced. The question is which ones get repriced upward in relative terms once the dust settles.

2. Why yields are rising: the full anatomy

This is the section most commentary skips, and skipping it is how you end up with the wrong conclusion. There are five distinct forces here. Let me take them one at a time.

The deficit is worse than anyone modelled

The US Treasury reported a 432.3 billion dollar budget deficit in July, the largest monthly shortfall since March 2021. Now, to be fair, that headline overstates things a little. Around 99 billion of that was August benefit payments pulled forward for calendar reasons. Fine. Adjust for it. The number is still enormous.

The Congressional Budget Office raised its expectation for the annual budget deficit to 2.1 trillion dollars, which is 200 billion more than it thought back in February. Through the first ten months of fiscal 2026 the deficit hit 1.8 trillion dollars, 169 billion more than the same stretch last year.

Total US government debt has now passed 40 trillion dollars. Total federal debt sat near 39.8 trillion by late July 2026.

That 40 trillion figure is abstract. Let me make it human. If you stacked 40 trillion one dollar bills, the pile would reach roughly from Earth to the Moon and back, about five and a half times. If you spent one dollar every second, you would need over 1.2 million years to get through it.

That is the pile Washington now has to refinance.

The interest bill has become the problem itself

Here is where it gets genuinely uncomfortable.

Federal net interest costs reached roughly 970 billion dollars in fiscal 2025 and are projected to go above 1 trillion, with interest payments consuming about 18.6% of federal revenues, beating the previous record set in 1991. The CBO puts debt service at 963 billion dollars for fiscal 2026, which makes interest the second largest line in the entire federal budget behind Social Security.

Interest on the national debt reached 857 billion dollars over the first nine months of the fiscal year, up 13% year over year, and that now exceeds what the government spent on Medicare and on the military over the same period.

America now spends more paying its lenders than defending itself.

According to Strategas, once debt servicing costs go above 14% of tax revenues, countries tend to hit fiscal strain and austerity. The US crossed that line in July 2023 and now sits around 20%.

And here is the loop that makes it self reinforcing:

• Treasury issues more debt to fund the deficit

• Investors demand higher yields to absorb the extra supply

• Old cheap debt matures and gets refinanced at the new higher rates

• Interest costs rise, which widens the deficit

• Which requires more issuance

It is a snake eating its own tail. In economics you sometimes hear this called an unstable debt dynamic. In plain language: the medicine is the disease.

It is not inflation. It is real yields.

This is the part that separates a good analyst from a headline reader.

A nominal bond yield is made of two things: what you expect inflation to be, and the real return you get on top of that. Real yield is your purchasing power gain. It is the actual rent on money.

The 10 year breakeven inflation rate, which is the market’s implied forecast for inflation, sat around 2.28% and had barely moved. Since July 1, the 10 year nominal yield rose about 20 basis points, from roughly 4.48% to around 4.68%, but breakeven inflation only rose about 4 basis points. The other 16 basis points came from real yields, with the 10 year real yield climbing from approximately 2.25% to 2.41%.

The 5 year, 5 year forward breakeven, which strips out short term noise and is the cleanest read on long run inflation expectations, currently stands at 2.32%.

So roughly 80% of the move came from real yields, not inflation fear.

Why does that matter so much? Because real yields sit at the centre of the valuation of literally everything. They are the inflation adjusted return you can earn on an asset backed by the US government. Every other investment on Earth has to beat that. When the real yield rises, the hurdle rate for every risky asset on the planet rises with it.

Mohamed El Erian, who used to run PIMCO, put it about as bluntly as a former bond CEO ever puts anything. He argued in a New York Times opinion piece that this is no ordinary sell off, and that continued pressure “could mark the beginning of a structural economic shift” more lasting than most previous bouts of volatility.

The technical name for the extra compensation investors demand to lock up money for thirty years is the term premium. It bundles together interest rate uncertainty, inflation volatility, how much new debt is coming, and how hard the bond might be to sell before maturity.

Here is the crucial distinction :

A bond sell off driven by temporary inflation fear reverses fast when inflation data improves. A higher structural term premium is much harder to shift, because it reflects the quantity and the credibility of government borrowing itself.

Using the simplest measure, the 30 year minus the two year, the US term premium currently sits at 103.5 basis points against a median since 1999 of 78 basis points, and a historical high of 399 basis points.

Barclays’ head of US rates strategy Anshul Pradhan argues that the deep change in the buy side over the past decade, with pension funds shrinking defined benefit plans and foreign investors diversifying away from dollars, is enough on its own to explain roughly 90 basis points of the move in the 30 year term premium.

Ninety basis points. From a structural change in who buys, not from inflation.

The Fed is not the driver, and that is the point

Now the fact I mentioned in the summary. The one that carries the entire thesis.

The Federal Reserve kept its policy range at 3.50% to 3.75% for a fifth consecutive meeting, on a 9 to 3 vote, with Beth Hammack, Neel Kashkari and Lorie Logan preferring a hike. Chair Kevin Warsh had emphasised in July that tighter financial conditions, including higher market rates, were already doing some of the central bank’s work.

So: policy rate at roughly 3.6%. Long bond at 5.3%. And the central bank is not tightening.

The long end is rising against monetary policy, not with it.

This is not a subtle point. It eliminates the lazy explanation. If the Fed were hiking, you would expect the whole curve up. It is not. The market is doing this on its own, and the market can do it for reasons a central bank cannot easily reverse.

The Fed sets short term rates. It does not directly control the 30 year yield, which is set by the market and reflects growth and inflation expectations, the expected path of future short rates, and the term premium.

There is a second, weirder layer here that I find fascinating. Critics argue that Warsh’s stated opposition to forward guidance, meaning the practice of telling markets what the central bank expects to do next, has increased the uncertainty premium baked into yields, and Mark Cabana of BofA Global Research told Axios that “there is literally a price to be paid” for that lack of guidance.

Think about that. The absence of a central banker’s words is itself now priced into your mortgage.

And then there is the fifth force, which is the actual story

Deficits. Real yields. Term premium. Fed uncertainty.

Those four are the ones everybody writes about.

The fifth one is the reason you are reading an Asian tech newsletter right now. It is the one that turns a macro story into a stock picking story, and it points directly at a handful of suppliers on the other side of the Pacific.

Crowding out, or: how an idea from 1817 came back to eat the AI trade

There is an old idea in economics called crowding out. The basic version says that when a government borrows too much, it soaks up the available savings in the economy, leaves less capital for private companies, and pushes everyone’s borrowing costs up. Classical economists were arguing about it two centuries ago. It shows up in Ricardo. It shows up in the Keynes versus Hayek fights of the 1930s. It is one of the oldest arguments in the discipline.

And here is the twist that Bloomberg reporters spotted in August: as the hyperscalers go on a borrowing binge for artificial intelligence and hit the market with a record flood of bonds, some people are starting to wonder whether the effect is now running in reverse.

Reverse crowding out. Big Tech is crowding out the sovereign.

Let me give you the numbers, because they are frankly insane.

US technology companies used to sell around 61 billion dollars of bonds a year, which was the five year average according to JPMorgan Asset Management in July. In 2025 they sold 131 billion. By late July 2026 they had already sold 192 billion. One single sector now accounts for 27% of all net investment grade bond sales, while total issuance from every US company reached 1.68 trillion dollars through July.

Investment grade companies overall sold nearly 1.5 trillion dollars of bonds this year, a 36% jump from a year earlier, putting them on pace to eclipse the record set in 2020 when everyone was rushing to lock in near zero rates. Nomura Securities estimates that roughly 200 billion of borrowing by the biggest tech companies alone equals about 25% of the Treasury’s net issuance of notes and bonds to private investors, which is five times more than it was in 2025.

Twenty five percent. Big Tech is now the size of a quarter of the US government’s long term borrowing programme.

Goldman Sachs had expected around 322 billion dollars of AI related debt across investment grade, high yield and leveraged loan markets in 2026. By late July the total was already approaching 500 billion. Goldman data cited by El Erian shows hyperscalers have already sold nearly 500 billion in bonds in 2026 and plan to borrow a minimum of another 300 billion before year end.

They blew through the full year forecast by July.

And the pricing tells you exactly what is happening. Alphabet recently issued 30 year debt at a yield of nearly 6.4%, which is 1.15 percentage points above comparable Treasuries. Last month, a bond financing a data centre tied to Meta paid over 7.5%.

Stop and appreciate that. You can now lend money to two of the most profitable companies in human history and get paid 6 or 7%. Why on earth would you accept 5.3% from the government?

You would not, and investors did not. Bond funds limited to investment grade US debt cut their Treasury holdings this year and raised their average allocation to corporate bonds to 30%, a three year high, according to Morningstar. A similar shift showed up among overseas investors, long a key source of funding for the federal government.

The government is being outbid. By its own tech sector.

Tony Rodriguez, head of fixed income strategy at Nuveen, put it very simply: whoever is issuing “is now competing with more borrowers,” and therefore yields have to be higher.

Bank of America’s economists wrote that AI borrowing is potentially crowding out long end Treasury demand and has played a major role in the rise in yields, estimating that the surge in corporate debt sales, together with more mortgage backed issuance, pushed 10 year rates up by about 0.3 percentage points this year. On those numbers, new debt supply alone explains roughly 60% of the move in the 10 year this year, given the benchmark is up 0.49 percentage points since January 2.

Sixty percent.

And it is early. Alex Payne, a senior portfolio manager at Vanguard focused on Treasuries and mortgages, said AI spending has become the top issue in his firm’s daily discussions, because “it just touches everything.”

JPMorgan Asset Management projects 5.5 trillion dollars of AI capital spending through 2030, and expects 2.1 trillion of that to come from new bonds. Greg Peters, co chief investment officer at PGIM, called it a crowding out effect and added that “this hyperscaler debt issuance story has really just begun.”

The loop, stated plainly

AI needs capital. Capital comes from bonds. Bonds compete with Treasuries. Treasury yields rise. The discount rate applied to future AI profits rises. The value of the AI story falls.

The boom is taxing itself. And it is doing it with money it borrowed to build the boom.

That is genuinely one of the more elegant feedback loops I have seen in markets. It is also, I think, the most under discussed dynamic in global finance right now.

But notice something about that loop. Every single arrow in it points at the buyer of compute. The hyperscaler borrows. The hyperscaler pays the higher spread. The hyperscaler’s multiple compresses.

Nobody in that chain is a Korean equipment maker.

The money still gets raised. The money still gets spent. It still lands, physically, on the same small group of Asian suppliers who make the machines. What changes is who bears the cost of capital, and it is not them.

Keep that asymmetry in your head. We come back to it hard later.

3. The intervention: what happened in the last ten days

Now the right hand side of the chart. The part where the line comes back down.

This section matters more than any other, because it decides whether the rate regime I am describing is a temporary spike you wait out or a structural floor you build on.

What Bessent actually did

On August 19, in a direct attempt to push long term yields back down, Treasury Secretary Scott Bessent announced the government would double its own bond buybacks to at least 4 billion dollars per operation, targeting maturities of 10 to 30 years, running from September 9 through November 4.

The logic is mechanical: when the Treasury buys its own bonds in the open market, that extra demand lifts prices, and higher bond prices mean lower yields. Officials indicated they could tap the roughly 1 trillion dollar General Account to fund it, though they never specified how. Bill Stone called it a version of Operation Twist: buy long maturities, fund the purchases with short term bills.

Think of it as a homeowner buying back his own mortgage using his credit card. The mortgage rate goes down. The credit card balance goes up. Nothing about how much he owes has changed.

For five days it looked like a straightforward failure. Yields tumbled about 10 basis points on the announcement, then unwound almost immediately. By Thursday the 10 year sat at 4.704%, above where it stood before the 8:30 a.m. announcement. By Friday the 30 year had climbed to 5.273%, against 5.21% a week earlier, even after Bessent signalled the operation could end up larger than 4 billion.

The commentary was withering.

• JPMorgan’s Maia Crook: the interventions “belie the underlying structural challenges and do nothing to address them”

• TD Securities’ Gennadiy Goldberg: this is verbal intervention, a “warning shot across the market’s bow,” with actual purchases weeks away

• ING: it “smacks of discomfort” about borrowing costs, and while unlikely to change the trajectory for long end yields, it does mute it

That last line is the smartest thing anyone said about the episode. It does not change the trajectory. It mutes it.

And then, guys, it worked. I had written this section very differently a week ago and had to tear it up, which is what happens when you write about a live market.

The 30 year peaked at 5.31% on August 17 and has since come down to 5.19%. The 10 year now yields 4.66%, from 4.72%. More importantly, the gap between Treasury yields and swaps of equivalent duration has narrowed.

That swap spread detail is the real evidence, so here it is in plain language. A swap rate reflects the general price of interest rate risk. A Treasury yield reflects the price of holding an actual government bond. When the gap narrows, investors are more comfortable owning the paper itself, not just less worried about rates in general.

So this is not a price move on a screen. It is a genuine improvement in appetite for US government debt.

Bessent, a longtime hedge fund manager, believes carefully crafted interventions can have outsized effects by persuading traders that betting against the US government is hazardous. Citi’s Jason Williams called it a new Treasury put that improves the asymmetry of owning the long end by providing a light backstop. A “put” here means a floor: traders now believe that if long yields spike again, Bessent shows up with a bid. That belief alone changes behaviour, which is the point.

Credit where it is due. Good trade by a man who spent a career making them.

So does this kill my thesis?

No. And I want you to actually think about this rather than take my word for it, because it is the single most reasonable objection anyone can raise against this whole edition.

Three reasons.

One: look at where the line stopped. It did not go back to 4.63%. It stopped at 5.18%. Long term borrowing costs remain near multidecade highs. The intervention removed roughly 13 basis points from a move of roughly 55. It took out the panic, not the level. And my entire argument is about the level, not the panic.

Two: the size is trivial next to the problem. Treasury’s purchases are tiny relative to the roughly 30 trillion dollar US government debt market, which means the purchases alone will not determine where long term interest rates go. Four billion per operation against 30 trillion outstanding. That is a rounding error with outstanding public relations.

Three, and this is the one that settles it for me. Stan Druckenmiller, who happens to be Bessent’s own former mentor, argued in the Wall Street Journal this week that the underlying cause of higher rates is massive US fiscal deficits, which tactical interventions will not solve. His line: “You can’t buy your way out of a solvency conversation with liquidity tools.” You can only postpone the conversation and raise the eventual price.

The distinction that decides everything

A liquidity problem is when the buyers exist but cannot transact smoothly. Buybacks fix that.

A solvency conversation is when the buyers start questioning whether they are being paid enough to lend at all. Buybacks postpone that.

What the chart shows is a liquidity tool applied to a solvency question. It worked exactly as far as liquidity tools work, and not one basis point further.

And there is a deeper shift underneath all of this that I think is the real story of 2026. A new paper by Stanford economist Hanno Lustig, published by the Aspen Economic Strategy Group, argues that the US government can no longer count on favourable borrowing conditions as a matter of course. It is now competing in global capital markets where individual investors, financial institutions and foreign nations will finance massive American deficits only to the extent that Treasury securities offer superior risk adjusted returns to the alternatives.

Treasuries are not the default anymore. They are a competitor.

And right now they are competing against Alphabet at 6.4%.

The thing the Treasury cannot buy back

Which brings us to the point that matters for an Asian tech newsletter.

The Treasury can buy back its own bonds. It cannot buy back Meta’s.

The buyback programme addresses government supply. It does nothing whatsoever about the other half of the story, and that half has already swamped it.

Bessent has leaned heavily on short term debt sales to finance the deficit instead of long bonds, which let him keep 10 year and 30 year auction sizes steady. Barclays estimated the shift would curb net supply of new Treasury notes and bonds to about 1.2 trillion this year, roughly 440 billion less than in 2025. But the surge in new AI debt, much of it also long dated, more than filled the breach, with net corporate bond supply expected to swell by 474 billion, most of it from the tech giants.

Read those two numbers side by side.

• Treasury removed 440 billion of long duration supply from the market

• Corporate issuers, mostly tech, added 474 billion

The government cleared space and Big Tech immediately parked in it. Then double parked.

Jonathan Cohn at Nomura warned that a growing supply of long dated debt from AI related companies could eventually force the Treasury to shrink its own long term debt sales just to avoid higher borrowing costs.

Let that sink in. The scenario on the table is the US government reducing its own long bond issuance because Meta and Alphabet are taking the room.

This is the single most important conclusion in the article for an investor.

The buybacks are a liquidity measure, not a solution. They can improve secondary market functioning and support demand for older securities, but they cannot eliminate the need to finance persistent deficits or reduce the volume of new debt the government ultimately has to issue.

So yes, Bessent won the skirmish. He calmed the market, he narrowed the swap spread, he took 13 basis points off the long bond and he made shorting it dangerous. Genuinely well played.

But look at what he was fighting. He was fighting his own government’s supply. And his own government’s supply is now the smaller half of the problem.

The Treasury pulled 440 billion of duration out of the market. Big Tech put 474 billion back in. No buyback programme addresses that, because there is no facility at the US Treasury for repurchasing Alphabet’s 2075 bond.

Which means the level holds. Not the panic. The level.

And the level is all my thesis needs. This rate regime is not a headline you wait out. It is the floor you build on.

Which means the sorting machine keeps running. Every quarter, at 5.18%, capital gets reallocated away from promises and toward invoices. That process has a geography, and we are about to see exactly what it is.

4. The duration lesson

Now we get to the mechanism. This is the part that decides who wins.

I am going to explain it properly because most people, including a lot of professionals, use the word “duration” without meaning anything precise by it.

The concept

The value of a share is the sum of all the cash the business will ever generate, discounted back to today. Discounted, meaning: a dollar in 2040 is worth less than a dollar today, and the discount rate tells you how much less.

Equity duration is the weighted average timing of those cash flows. It measures how far into the future the value of a company actually sits.

Two very different profiles:

• A company where 80% of the value lives in the terminal value beyond 2035. Think of a model lab, a neocloud, an infrastructure play that monetises “later.” Effective duration of roughly 25 to 30 years.

• A company valued on a contracted order backlog covering the next 24 months plus a pricing cycle already in progress. Effective duration of roughly 6 to 10 years.

The rough arithmetic: the change in value is approximately minus the duration multiplied by the change in rate.

The 30 year went from below 5% at the end of June to above 5.3%. And it has risen from below 5% at end June to above 5.3% in a matter of weeks. Take a wider window and call it 130 basis points from the start of the year.

Apply it:

• 25 year duration asset, 130 basis point move: roughly 25 to 30% of fair value removed

• 8 year duration asset, same move: roughly 8 to 12% removed

The same macro shock hits the story roughly three times harder than it hits the invoice.

That is not an opinion. That is arithmetic.

As Chase’s own investing education team puts it, growth stocks whose valuations rest on earnings expected years in the future are more sensitive to rising yields, because a larger portion of their expected earnings lies further out and gets valued less highly as rates rise.

A company does not need to report weaker earnings for its valuation to fall. If the discount rate applied to those earnings rises materially, the multiple contracts on its own.

The honest caveat

I have to be straight with you here, because this is where lazy versions of this argument fall apart.

The duration calculation assumes the numerator does not move. It assumes earnings stay put and only the discount rate changes.

If earnings move, everything changes. We come back to this in the risk section, and I am not going to bury it.

The analogy

Think of two mortgages.

One is a thirty year fixed. One is a two year fixed. Interest rates move up sharply. Which one just got repriced hardest? The thirty year, obviously. The two year holder barely notices, because their contract expires and gets replaced before the pain compounds.

Equities work the same way. A company whose value is a promise about the 2040s is a thirty year fixed. A company whose value is a signed contract for delivery in 2027 is a two year fixed.

When the price of time goes up, own the short contract.

Now ask yourself a simple question. Where in the world are the short contracts?

They are not in California. They are in the order books of the companies that manufacture physical equipment against signed purchase orders with 12 to 24 month delivery windows. That industry has a centre of gravity, and it sits between Seoul, Tokyo and Taipei.

This is not patriotism about Asia. It is an observation about cash flow shape.

5. The Japan channel: the same event, seen from the other side of the Pacific

This is the piece almost nobody connects, and honestly it is the reason I got excited enough to rewrite my whole publishing schedule.

Go back to that Barclays observation about the buy side changing. Who was the great insensitive buyer of US long duration for thirty years?

Japan.

For decades, Japanese government bonds paid almost nothing, and the Bank of Japan’s ultra loose policy pushed domestic investors overseas hunting for yield. Japanese pensions and insurers became one of the great structural bids under the US Treasury market.

That regime just ended.

Japan’s 10 year government bond yield reached 2.945% on August 18, its highest level since 1996, while the 30 year reached 4.115%. Japan remains the largest foreign holder of US Treasuries, although its holdings fell 2.3% in June to 1.116 trillion dollars.

Japan’s term premium tells the same story even more starkly. The 30 year minus two year spread there currently sits at 239 basis points against a historical median of 165 and an all time high of 269. Japanese consumer prices rose 1.9% year over year in July, after being at or below zero for much of the period since 1999.

Year to date, the US 30 year yield has risen 0.43 percentage points, but the moves in Japan, the UK and Italy have all been larger, with Japan of particular interest given its combination of a massive debt load and the biggest 30 year move of the group.

With Japanese government debt above 200% of GDP, higher yields create a brutal policy equation: inflation justifies tighter money, but tighter money raises the debt servicing burden.

And here is the consequence that matters for us:

If Japanese bonds offer increasingly attractive returns at home, Japanese investors have less incentive to allocate capital to US Treasuries and other foreign bonds. That does not imply sudden liquidation. But when US issuance is rising at the same time, even a marginal reduction in foreign demand can influence the price investors require to hold long duration US debt.

So follow the chain:

• Japanese yields rise

• Japanese capital has less reason to leave home

• The US long end loses its most reliable insensitive buyer

• The US term premium rises

• Which is exactly the 90 basis points Barclays was talking about

The American bond sell off and the repatriation of Asian capital are not two stories. They are one story, observed from opposite shores.

And it is not only Japan.

• Germany’s 30 year Bund yield has climbed to levels last associated with the eurozone sovereign debt crisis.

• France faces weak growth, high debt and persistent deficits, with the European Commission forecasting a government deficit of 5.1% of GDP in 2026 and 5.7% in 2027, and public debt rising from 115.6% of GDP in 2025 to more than 120% by 2027.

• The UK recorded public sector net borrowing of 57.6 billion pounds in the financial year to June 2026, with net debt approaching 3 trillion pounds and the 30 year gilt yield reaching around 5.86% on August 18.

Without exception, the fiscal positions of large countries deteriorated because of pandemic spending, and most were already increasing debt relative to economic activity before that. Government bond investors are demanding higher yields across most countries, which may lead to a shift in markets’ willingness to fund large deficits at all.

This is a global repricing of the cost of time. Not an American accident.

Philosophically, I find this fascinating. For fifteen years we lived in a world where capital was free and time was cheap, and we built our entire mental model of “growth investing” on top of that assumption. We are now discovering that the assumption was the anomaly, not the rule. Some analysts have made exactly this point: if the 2008 crisis created an era of ultra low rates, the current pattern may simply be announcing a return to the normal interest rate level that existed before the crisis.

We were not living in the future. We were living in a bubble in the price of time.

And the deflating of that bubble is not a loss event for everyone. Japanese capital coming home is a bid for Japanese assets. Korean industrials with net cash balance sheets are no longer competing against free money. The same repricing that punishes a Californian terminal value quietly rewards a Seoul order book.

One event. Two very different outcomes, split almost perfectly along a line of longitude.

6. What the sell off is already doing to markets

Let me show you the damage, because it is instructive about who bleeds.

The Philadelphia Semiconductor Index tumbled 5% on a single Monday. On the Tuesday close, the S&P 500 fell 53.30 points or 0.69% to 7,691.76, and the Nasdaq Composite dropped 355.20 points or 1.33% to 26,289.71, both posting their largest single day percentage drops since July 29. Among the eleven core S&P 500 sectors, information technology fell the most at 1.9%.

The biggest drags were chip names: Nvidia fell 2.3%, and Micron plunged 7% after surging nearly 18% across five consecutive sessions. Data storage names SanDisk and Western Digital fell 9% and 7.4%, and the Roundhill Memory ETF dropped 8.8% after five straight days of gains.

Investors rotated defensively: healthcare rose 1.6%, consumer staples closed up 1.1%, and the energy sector led all sectors with a 1.8% gain on stronger oil. The VIX fear index rose 0.65 points to close at 15.84, its highest close since August 4.

Tony Welch, chief investment officer of SignatureFD, summed it up neatly:

Nothing kills a momentum rally like rising interest rates, and that is exactly what was on display. Burns McKinney of NFJ Investment Group described it as a domino effect, where the breakdown of US Iran peace talks pushed oil up, which raised inflation expectations, which lifted bond yields, and rising yields always inflict disproportionate damage on tech.

By the late New York session, the two year yield had eased to 4.165%, the five year to 4.362%, the 10 year to 4.702% and the 30 year to 5.283%, but the panic in the bond market clearly had not gone away.

And here is a datapoint I keep coming back to. The average yield of the benchmark investment grade government bond portfolio has soared to about 4.5%, the highest level since Bloomberg began tracking that data in 2015.

The competition for your money is real and it is priced.

The spillover is wide. Mortgage rates have held near 6.7%, and El Erian warns that housing, auto loans and credit card balances are in the crosshairs, with low income households likely to bear the brunt. Higher yields also erode the market value of long term bonds held by banks, insurers and pension funds, turning paper losses into real ones if they are forced to sell before maturity.

And for the assets that pay you nothing at all, it is brutal. PIMCO research covering 2004 through 2025 found a strong historical relationship between higher real yields and weaker gold, estimating that a 100 basis point rise was associated with roughly an 18% decline in gold’s inflation adjusted price, with around 2.5% flagged as an especially demanding real yield environment for non yielding assets. On the day the 30 year hit its high, gold fell roughly 1.1% to 4,369 dollars an ounce and silver dropped around 2.7% to 64 dollars, pushing the gold to silver ratio from about 67.1 to 68.3.

Bitcoin has had it worse. Bitcoin trades near 63,517 dollars, down 46.1% over the past twelve months, while gold rose 32.6% over the same stretch, leaving a gap of almost 79 percentage points. The mechanism is simple: bonds pay interest and Bitcoin does not.

The rule of a 5% world

If it does not pay you, it has to justify itself.

If it pays you now, it wins by default.

Look again at what actually got hit in that sell off. Micron. SanDisk. Western Digital. The memory ETF. Nvidia. Every one of them repriced on the discount rate, not on a change in demand.

That is the market applying one blunt rule to a sector that contains two completely different kinds of business. It is treating a company with a signed 2027 delivery schedule exactly like a company with a 2033 story.

Indiscriminate selling is not a risk. It is an entry point, provided you can tell the two apart.

Telling them apart is what the rest of this article does.

7. But is this actually a crisis? No. And that matters.

I want to be careful here, because a contrarian writer who only argues one direction is not an analyst, he is a salesman.

Bill Stone makes a strong case that the move is not extreme in either historical or global context. The 10 year and two year yields are actually slightly below their recent highs from early 2025. US recession odds remain exceptionally low at 8%. Stocks fell 1.4% over the relevant week, with small caps down 1.6%, yet remained only 1.5% off all time highs.

He also points out that a simple model relating the 10 year yield to nominal GDP growth suggests the 10 year could actually be a bit below where it should be, and if Goldman’s nominal GDP estimates are right, yields are very close to fair.

And the mitigating factor for equities is real: rising yields driven by better nominal growth are tolerated more easily, because nominal GDP growth is a primary driver of corporate profits, so rising earnings expectations can offset higher discount rates. Stocks are also a genuinely good hedge against long term currency debasement, and history is full of countries choosing to inflate away their debts.

The US has extraordinary privileges: high GDP per capita, control of the global reserve currency, and the ability to issue debt only in its own currency. Like any privilege, it can be abused until it is revoked.

Stone even reaches for the Churchill line, probably apocryphal, about Americans always doing the right thing once every other option has been exhausted.

And to be balanced about it, a higher long yield does not automatically signal a recession, a crash, an imminent Fed hike, or a reason to sell everything. It can equally reflect stronger growth expectations.

I agree with all of that.

My thesis does not require a crisis. It requires only one thing: that the cost of time stays structurally higher than it was in 2021.

And on that, I think the evidence is overwhelming.

Technical projections cited in the analysis suggest long term yields could eventually reach roughly 5.60 to 5.70%, with the previous 2007 peak sitting around 5.44%. If the 30 year moves toward 5.6% while breakevens stay near 2.3%, the message is uncomfortable: real rates and term premium continuing to rise despite contained inflation, tightening financial conditions without the comfort of stronger nominal growth.

The consensus in the market, even among people who disagree about the weight of each factor, is that these structural pressures will not subside in the short term. The retreat from 5.31 to 5.18% does not contradict that. It confirms it, because 13 basis points is exactly what a liquidity tool buys you against a structural problem.

Meaningful declines in yields would depend on getting inflation under control, and that is being challenged by elevated oil prices and geopolitical tensions affecting supply routes. Kim Hak kyun’s view is that US Treasury yields find stability if the war ends and eases both the fiscal deficit and oil driven inflation pressure.

Maybe. I would not build a portfolio on it.

And notice that even the optimistic case works for us. Stone’s argument is that yields are rising alongside decent nominal growth, which supports corporate profits. Fine. Then the AI buildout continues, the capex gets spent, and the Asian suppliers deliver against it while the American buyers pay a higher cost of capital to fund it.

Bull case or bear case on rates, the supplier gets paid. That is what asymmetric actually means.

8. What high rates actually do to the AI buildout

Everything above was the diagnosis. What follows is the trade.

Behind the paywall:

• What high rates actually do to the AI buildout, and why the Korean bear case gets the mechanism right and the conclusion backwards.

• The three conditions that decide whether an entire industry gets paid or punished by high rates. Apply them to anything, forever

• The layers of the AI stack that profit, and the layers that get hurt, with all seven run through the test

• Six Asian companies inside the winning layers, each screened against a five point company filter

• What I own, what I am adding, and the four ways I could be wrong

You now understand the machine. Below is where it points.

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Asia Next, X-RAY #5 Part 2

If you are new here, welcome to Asia Next. We uncover Asia’s most overlooked investment opportunities: hidden world leaders quietly controlling a vital bottleneck of the global tech supply chain, companies whose world first technologies no competitor can replicate, and strategic players no headline ever mentions. Undervalued today, indispensable tomorrow: that’s where the real upside hides.

The trade found it

Something happened this year that I have been watching with a mixture of satisfaction and unease.

Liquid cooling became a trade.

Not a niche. Not an engineering topic. A trade, with baskets and flows and headlines behind it.

In May, Goldman Sachs said it out loud. Shawn Tuteja, who runs ETF and custom basket volatility trading in Goldman’s Global Banking and Markets division, put it like this: his baskets team sees the next iteration of the AI equipment trade being within liquid cooling.

The financial press caught up within days. One headline ran: Forget chips, liquid cooling may be the next big AI trade.

Then look at what the tape actually did.

• Carrier reported data centre related orders up more than 500%, with its backlog now fully covering a 1.5 billion dollar annual segment target

• Taiwan’s thermal suppliers posted record revenue month after month through 2026, with the sector diverging sharply as liquid cooling names pulled away from traditional cooling players

• A small Nasdaq listed component maker, ZJK Industrial, rose 94% in a single session because Nvidia asked it to produce samples for a liquid cooling manifold project

Read that last one again. 94%, in one day, on a request for samples.

That is not a market discovering a theme. That is a market that has already discovered it and is now hunting for anything with the word cooling attached.

And that should make you uncomfortable

I wrote Part 1 of this series on the manufacturing layer, and I stand behind every word of it. The bottleneck is real, the qualification moat is real, and the company I named is a genuinely excellent business.

But I would be doing you a disservice if I pretended that the manufacturing layer is still undiscovered.

It is not. Goldman has a basket. Carrier has a 500% order book. Taiwanese thermal names have compounded several hundred percent over three years. Stocks are doubling on sample requests.

When a theme gets this crowded this fast, the useful question stops being “is this real?”

It becomes: “what did everybody skip?”

Because here is the thing about the way this trade formed. It formed around the visible layer. The parts. The things you can photograph and put in a slide.

And a cooling loop has three layers, not one.

Somebody has to build it. Somebody has to prove it holds. And somebody has to keep it alive for a decade.

The market has bid up the first. It has, as far as I can tell, done nothing whatsoever about the other two.

One of today’s two companies has, over the past six months, underperformed its own index by seventeen percent, while holding a structural position in the equipment that decides whether cooling components are allowed to leave a factory.

In the middle of the loudest cooling trade in history.

That is the letter.

The question the trade never asked

In Part 1, I walked through six bottlenecks in the cooling chain, showed that three of them form the shortage physically stopping deliveries today, and named the Taiwanese company qualified across all three.

I also deliberately walked past two of the six, and left a question hanging over one of them. It is a question nobody building a liquid cooling basket has bothered to ask, and the answer turned out to be the most interesting thing in this entire research project.

How do you actually know that a cold plate does not leak?

It sounds like a quality control detail. It is not. Consider what you are being asked to establish. A sealed copper block with channels narrower than a human hair, which will sit directly above two million dollars of accelerator, under pressure, through thousands of thermal cycles, for a decade. And you have to be certain, before it ships, that it will never release even a few millilitres of fluid.

You cannot check by eye. You cannot reliably check with air pressure. A leak that is completely invisible at atmospheric pressure will still, over eighteen months, empty a loop or drip onto a board.

The industry’s answer is helium mass spectrometry, and it produces a consequence I have not seen written anywhere:

You cannot ship what you have not proven.

Which makes verification capacity a hard ceiling on production capacity. A bottleneck sitting behind the three bottlenecks from Part 1.

Then there is the second question, which almost nobody is asking yet, for the simple reason that it does not hurt anyone today.

What happens to these loops in year six?

Water is a solvent, an electrolyte and a growth medium. The corrosion inhibitors protecting your mixed metal system are consumable, and they deplete as they do their job. A loop that was perfectly protected at commissioning can be significantly under protected three years later, with nobody noticing until something pits through.

That is today’s letter. Two questions, two bottlenecks, two Japanese companies.

Neither of them makes cooling equipment.

Where this sits in the series

Quick recap for anyone joining here, and a reminder for everyone else, because today only makes sense against what came before it.

In Part 1 I laid out six bottlenecks in the liquid cooling chain. Then I argued that they are not six parallel problems at all: five of them collapse into three families, and the sixth is not a bottleneck but the mechanism that makes the other three permanent.

Here is the full map, with today’s territory marked :

And the three families, which are not parallel markets but three consecutive phases in the life of the same asset:

What Part 1 concluded

Three shortages, in cold plates, coolant distribution units and elastomer seals, with three completely different industrial causes. Not enough copper? No. Not enough machines? No.

What is scarce is not manufacturing. It is qualification. A production line a customer has validated, on a certified component, with a demonstrated reliability record behind it. The machine can be bought. The qualification cannot.

And the reason it stays scarce is bottleneck six: the specification resets with every chip generation, so a qualification never amortises, and the incumbent’s head start is functionally permanent.

I named a Taiwanese company holding qualified positions across all three of those shortages, and showed the moat sitting in its accounts as gross margin expanding while volumes exploded.

What today adds

Bottleneck three and bottleneck five. The two that Part 1 deliberately walked past.

If Part 1 answered who builds the loop, today answers the two questions that follow it: who signs off on it, and who keeps it alive.

And I will say plainly what I only hinted at last time: these are better businesses. Smaller, slower, less exciting, and structurally superior. One sells instruments with an installed base and a fifteen year service annuity attached. The other sells a consumable into a system nobody dares change.

Bottleneck six comes back too, in a second form, and it does something to these two layers that it does not do to manufacturing. That is the part I think is genuinely new.

What this edition covers

• Why proving a part is tight is harder than making it, and the physics of why helium is the only tool that works

• The consequence nobody has connected: verification capacity as a hard ceiling on liquid cooling output

• Why the absence of a standard does something to the testing layer it does not do anywhere else, and why that is worse for customers and better for suppliers

• What actually happens inside a cooling loop over six years: biofilm, pitting, inhibitor depletion, and the failure that looks like a manufacturing defect but is not

• The job title that did not exist in 2022 and is now being recruited at serious money

AND most of all:

• The 150 year old Kyoto instrument maker whose leak detectors gate whether cooling components can leave the factory, trading near twenty times forward with essentially no debt, and which has underperformed its own index by 17% in six months

• The water treatment leader whose ultrapure semiconductor expertise transfers directly to the coolant loop, deliberately rebuilding itself into a recurring revenue business, with profit forecast up 78.8%

• The risks and frictions, including the one that applies to both names

• My honest opinion, my conviction, my sizing, and what I am doing with my own money

Everyone is watching manufacturing

The consensus on cooling, to the extent that one exists at all, is a manufacturing consensus.

Who makes the cold plates ? Who has capacity ? Who is on the bill of materials ? That is where the coverage sits, that is where the Taiwanese analysts are, and it is where I spent Part 1, because it is genuinely where the largest pool of money is today.

It is also, I think, where the analysis stops far too early.

Because manufacturing is only the first phase of an asset’s life, and it is the phase with the worst economics of the three.

Making a component is a volume business. You need factories, capital and working capital. Your margin depends on how many competitors qualified this generation. And when the buildout eventually matures, your revenue matures with it.

Proving a component and maintaining it are installed base businesses. You sell an instrument once and service it for fifteen years. You sell a chemical continuously, into a system the customer will not risk changing.

Same bottleneck. Same customers. Completely different quality of revenue.

Here is the structural point, and it is the reason this letter exists.

The buildout will eventually slow. The installed base will not.

Every rack shipped between now and 2030 becomes, on the day it is commissioned, a permanent customer for verification, monitoring, chemistry and service. The manufacturing wave and the maintenance wave are the same wave, observed at two different times.

Right now the market is pricing the first one and almost none of the second.

Why now, for these two specifically

Two things changed recently that make this timely rather than theoretical.

One, the installed base crossed a threshold. Liquid cooling penetration among AI chips goes from roughly 33% in 2025 to 53% in 2026 and approaching 60% in 2027, per TrendForce, with Nvidia rack scale shipments doubling in 2026. For the first time there is a large, young, fast growing population of liquid cooled systems in the field, all of which will age.

Two, the failure literature started appearing. Through 2025 and 2026 a body of research emerged quantifying what actually goes wrong in these loops: heat transfer penalties, inhibitor depletion, microbiologically influenced corrosion. Three years ago this was folklore. It is now measurable.

The industry is beginning to understand that it has bought something with an ongoing maintenance obligation, rather than a component.

PROVE IT: the bottleneck behind the bottleneck

Let me take the two families in order, starting with the one that constrains production today.

Why you cannot simply test with air

Start with the requirement, because it is stricter than people assume.

A liquid cooling component has to be certified not merely leak free at working pressure, but leak free to a threshold measured in millibar litres per second, at sensitivities around ten to the minus eleven or minus twelve. That is a leak rate so small that filling a teaspoon would take longer than recorded history.

Why so extreme? Because of the timescale and the consequence. A leak of one drop per week is invisible during commissioning, harmless for the first month, and catastrophic across a decade, sitting directly above a two million dollar accelerator.

Air pressure decay testing cannot resolve that. Neither can water immersion, dye penetrant or visual inspection. The signal is too small.

So the industry uses helium

The method is elegant and has been standard in aerospace, refrigeration and semiconductor vacuum equipment for decades.

Put the component in a vacuum chamber. Fill it with helium. Then use a mass spectrometer to detect any helium atoms that find their way out.

Helium is used for two reasons. Its atoms are among the smallest of any gas, so it finds paths nothing else would. And it is chemically inert and rare in normal atmosphere, so any helium the instrument detects almost certainly came from your part.

A helium leak detector is, functionally, a mass spectrometer built for exactly one job: ionise the gas, separate ions by their mass to charge ratio, and count helium specifically.

Doing that reliably on a factory floor, at production tact time, is where the engineering lives. Laboratory mass spectrometry has all the time in the world. A production leak detector must give an answer in seconds, hundreds of times a shift, and recover automatically when a badly leaking part floods the analyser with helium, which happens constantly, because catching bad parts is the entire point.

Now the consequence nobody has connected

Here is where this stops being a technical curiosity and becomes an industrial constraint.

This is not sample testing. It is one hundred percent inspection.

Major Western coupling vendors state it plainly in their own product literature: every single coupling is helium leak tested, with clean room assembly and end of line verification. The same logic runs through the loop. Every cold plate. Every manifold. Every coolant distribution unit.

It has to, because the failure is not statistical. One bad coupling out of five hundred in a rack is not a yield problem. It is a destroyed rack.

Follow that through:

If every unit must pass a helium test before shipment, then the number of units you can test is the number of units you can ship.

Test bench capacity is not a support function. It is the factory’s true output limit.

Which means: helium leak detection capacity is a hard ceiling on liquid cooling production capacity.

A bottleneck sitting behind the three bottlenecks from Part 1. And when I went looking for who supplies it, the list was startlingly short.

Roughly eight companies worldwide build helium mass spectrometer leak detection systems at industrial scale. INFICON. Agilent. Pfeiffer Vacuum. Leybold. Edwards. ULVAC. Canon Anelva. And a Kyoto instrument maker founded in 1875.

Eight companies, deciding what is allowed to leave the factory, for an industry building out at more than twenty percent a year.

The moat, and it is not the physics

I want to be precise here, because the obvious answer is wrong.

The moat is not the mass spectrometry. That physics is a century old and thoroughly understood. Several of those eight could build a competitor’s instrument given time.

The moat is that this equipment is embedded inside a qualified production process.

When a supplier certifies a cold plate line for a hyperscale customer, the qualification package does not just cover the part. It covers the test method, the instrument, the calibration procedure, the acceptance criterion and the documentation trail. All of it becomes part of what the customer signed off on.

Which means you do not swap out the leak detector to save money on the next purchase order. You would have to requalify the line.

This is the same dynamic that makes semiconductor metrology such a beautiful business. The instrument is a rounding error in the capital budget. Changing it is a nightmare. So nobody ever changes it.

You are not selling a machine. You are selling a permanent position inside somebody else’s audited process.

Attached to that position is the recurring layer: calibration, service contracts, spare parts, consumables, training. In instrument businesses of this type, service typically represents a meaningful and high margin share of supplier revenue, and it persists across the fifteen year life of the installed instrument.

And here is what the absence of a standard does to this layer specifically

In Part 1 I argued that the constantly resetting specification prevents commoditisation, and I stand by it.

In the verification layer it does something different, and frankly worse for customers.

There is no universal acceptance threshold for leak rate.

Different customers specify different criteria. Different architectures imply different pressures. Different components sit at different points in the loop and therefore tolerate different rates. The Open Compute Project’s Universal Quick Disconnect specification is progressing toward genuinely interchangeable parts, with Meta completing EPDM hose evaluation for blind mate connectors in January 2026, but interchangeability of the part does not standardise the test protocol behind it.

So a supplier serving four hyperscalers may need four qualified protocols, and in practice multiple qualified benches, because you cannot recalibrate between protocols every shift and maintain an audit trail.

Fragmentation of standards multiplies capital equipment demand per unit of output.

The customer pays for that inefficiency. The instrument maker collects it.

That is not a flattering thing to say about an industry. It is, however, what is happening.

Criticality: 4 out of 5. Gates production absolutely. Lower total value captured than manufacturing, which is why it is a four and not a five.

KEEP IT: the bill that has not arrived yet

Now the second family, and a warning about how to read it.

Everything in PROVE IT is happening now. Everything in KEEP IT is happening now too, but nobody has noticed, because the damage accumulates more slowly than the industry’s attention span.

Water is not an inert substance

A liquid cooling loop is a mixed metal system: copper cold plates, aluminium heat exchangers, steel piping, brass fittings. Into that you put water, or water with propylene glycol, and circulate it continuously at temperature for a decade.

Three processes then begin, and they never stop.

Corrosion. Dissimilar metals in an electrolyte form an electrochemical cell. Chloride is the most aggressive routine contaminant, and the pitting it causes is insidious: highly localised, difficult to detect visually, and capable of producing pinhole leaks in cold plate microchannels. Loops are typically specified to hold conductivity at or below 100 microsiemens per centimetre and pH between roughly 8.0 and 10.5, because drift in either direction accelerates attack. Below pH 4, acidic dissolution of the passivation layer exposes bare metal to rapid corrosion.

Biology. Bacteria, algae and fungi colonise the loop and form biofilms. Biofilm is a genuinely vicious failure mode, because it attacks on three fronts simultaneously. It is thermally insulating, so even a microscopic layer degrades heat transfer and forces the cooling system to work harder. It restricts flow in narrow channels. And anaerobic bacteria living beneath it drive microbiologically influenced corrosion, producing rapid localised pitting. Microbial metabolism also generates carbon dioxide, creating gas pockets and flow interruptions.

Depletion. This is the one that matters most for the investment case, so I will treat it separately.

The inhibitors run out

Corrosion inhibitors are added to buffer chemical degradation, passivate metal surfaces and hold loop chemistry stable.

They are consumable. They deplete as they do their job.

Peer reviewed comparative testing of single phase data centre coolants under ASTM D1384 and D8040 standards found that properly inhibited propylene glycol fluids kept corrosion rates well within specification for copper, brass, solder and aluminium. But that performance is entirely contingent on maintaining adequate inhibitor concentration. Once depleted, corrosion rates on aluminium and copper rise sharply.

Now sit with the implication.

A loop that was properly protected on the day it was commissioned can be significantly under protected two or three years later.

Nothing visible has happened. No alarm has fired. The chemistry simply consumed itself doing exactly what it was supposed to do, and nobody replenished it, because nobody was measuring.

That is not a hypothetical failure mode. It is the default outcome of an unmanaged loop.

The glycol trap

Here is the part that genuinely surprised me, and which I think is the single most useful thing in this letter for anyone actually operating this equipment.

Most operators assume glycol keeps the loop clean. It is an antifreeze, it suppresses microbial growth, job done.

The reality is sharper. Glycol concentration below roughly 25% does not reliably inhibit biological growth. Which produces a perverse outcome: partially glycolated loops sometimes foul worse than clean water loops running a proper biocide programme, because the operator believes they are protected and therefore does not run one.

Research published in February 2026 went further, identifying heat transfer penalties from glycol in direct to chip loops, chemical degradation risk, false confidence in glycol as a biological control, and even dye interference with fluid analysis. That last one is almost comic: the dye added to help you spot leaks can obstruct the chemical testing that tells you whether the fluid is still good.

A further trap: mixing inhibitor chemistries from different manufacturers without laboratory verification can destabilise protection and accelerate corrosion. Topping up a loop with the wrong product is not neutral. It is actively harmful.

None of this is exotic chemistry. It is well established industrial water treatment practice.

It is just that data centre operators have never previously had to know any of it.

Why this bottleneck is invisible, and why that is the opportunity

I said earlier that KEEP IT scores 3 out of 5 today and rises. Here is the mechanism.

Chemistry failures are slow. Slow enough that they frequently become somebody else’s problem before they surface. The facilities manager who commissioned the loop has moved on. The vendor warranty has expired. The failure, when it finally comes, presents as a leaking cold plate and gets filed as a manufacturing defect.

That is precisely why the problem persists. Nobody is held accountable at the moment the decision is made.

Which means the demand curve for this service does not track new installations. It tracks the age of the installed base, with a lag of several years.

The liquid cooling fleet is currently very young. Most of it was installed in 2025 and 2026. So the first real wave of chemistry driven failures has not happened yet.

It will.

And when it does, the response will not be a gradual increase in maintenance budgets. It will be a scramble, because the failures will arrive in a cluster, in equipment of the same vintage, in facilities that never staffed for it.

A job that did not exist in 2022

The clearest signal of all is a labour market one.

There is now a role inside hyperscale facilities that is essentially a loop chemist: someone responsible for conductivity, pH, inhibitor concentration, biological control and fluid analysis on the technology cooling loop.

That role did not exist three years ago. Data centres had water treatment for cooling towers, which is a mature and well understood discipline, but nothing touching the fluid that contacts the silicon.

When an industry starts inventing job titles, it is telling you where its unsolved problems are.

Criticality: 3 out of 5 today. 5 out of 5 by 2030. The only reason it is not a five now is that the fleet is too young to have failed.

Why neither of these fixes itself

Same question I asked in Part 1. Shortages normally self correct. Why would these not?

For PROVE IT, the answer is the qualification lock in described above, plus a structural feature of instrument markets: the market is too small to attract a determined attacker, and too embedded to lose an incumbent. Nobody builds a helium leak detection business to disrupt a rival, because the total prize does not justify the effort. But everybody already inside collects the growth.

That is an unglamorous, durable, and quietly excellent market structure.

For KEEP IT, the answer is switching cost of an unusually pure kind.

Consider what changing your loop chemistry supplier actually involves. You are altering the chemical composition of a fluid circulating through several million dollars of running accelerators, in a mixed metal system, where the leading published warning is that mixing inhibitor chemistries from different manufacturers without laboratory verification destabilises protection and accelerates corrosion.

To save what? A few percent on a consumable that is a rounding error against the hardware it protects.

Nobody does this. Not because of a contract. Because of fear, and correctly so.

Fear was the switching cost in Part 1 too, after operators watched water hit a data hall floor. Here it operates in advance of the incident rather than after it, which is stronger still.

And the standardisation argument, in its second form

The mechanism I described in Part 1 applies here with a twist worth naming.

In manufacturing, the resetting specification prevents the learning curve from compounding, which protects the qualified incumbent’s margin.

In verification and chemistry, the absence of a standard does something else: it fragments the requirement per customer, forcing suppliers to hold multiple qualified protocols, multiple benches, multiple validated chemistries.

Same root cause. Different transmission mechanism. Both accrue to the incumbent.

I will come back to what happens when this finally does standardise, because it is the sell signal for the whole series.

So who fixes these two?

Right. You now have the full picture, so let me set up what comes next.

Two bottlenecks. Two questions the entire industry has to answer before a single rack goes live and stays live.

Bottleneck three: who proves it holds? Every cold plate, every coupling, every manifold, one hundred percent inspected, on instruments built by roughly eight companies on earth, embedded in audited processes nobody dares requalify.

Bottleneck five: who keeps it alive? Every loop, ageing from the day it is filled, with consumable inhibitors depleting invisibly and a failure mode that presents as somebody else’s manufacturing defect.

Now here is what I want you to hold in your head as we go into the names.

These two companies are not cooling companies. Neither of them appears in a single liquid cooling basket. Neither is classified by any data provider as AI infrastructure. Neither has issued a press release about liquid cooling, and I would be suspicious if they had.

And yet: nothing in an AI data centre gets built without one of them, and nothing in it survives ten years without the other.

Think about what that actually means for the next decade of compute.

Every gigawatt of AI capacity the world builds between now and 2030 has to pass through a verification step that eight companies control. And every one of those gigawatts then has to be kept chemically stable for a decade, by an industry that has been doing exactly this for semiconductor fabs since before most of these hyperscalers existed.

These are not suppliers to the AI buildout. They are preconditions for it.

And that is precisely what makes the valuations look the way they do, which is the part I find genuinely hard to believe.

One of them trades near twenty times forward earnings with effectively no debt, thirteen consecutive years of dividend increases, and a share price that has lagged its own index by seventeen percent while every other cooling adjacent asset on earth has been bid up.

The other is executing one of the cleanest hardware to service transitions I have seen in a Japanese industrial, with profit forecast up nearly eighty percent on flat revenue, and the entire AI cooling angle sitting inside it completely unpriced.

In Part 1, I told you the market had mislabelled a Taiwanese manufacturer.

These two are worse. The Taiwanese company at least sits in a sector the market associates with AI. These two are filed under laboratory instruments and industrial water treatment.

The misclassification is not “obscure company nobody has found.” It is critical infrastructure filed under the wrong heading, twice over, in a market that has spent six weeks buying anything with the word cooling in the description.

That gap is the trade. Let me show you the names.

The companies

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Today’s topic : liquid cooling, let’s go !

One line in a specification

Vera Rubin is Nvidia’s current generation AI platform, the successor to Blackwell. And it is not a chip you buy and slot into whatever server you like. It ships as a rack scale system: seventy two accelerators, the networking, the power delivery and the cooling, all specified together as one product, with a reference architecture telling customers exactly how it must be built.

Volume shipments started in the second half of 2026. Buried in that reference architecture is a line I keep coming back to:

The rack requires 100% direct to chip liquid cooling at 45°C inlet water.

No air cooled configuration exists.

Not recommended. Not preferred. Does not exist.

Which means that Nvidia, the architect of essentially all AI compute on earth, has just made liquid cooling compulsory for the entire industry, in the only way that counts: by writing it into the specification everybody is buying.

And TrendForce published the number that goes with it :

Liquid cooling penetration among AI chips is projected to rise from roughly 33% in 2025, to 53% in 2026, approaching 60% in 2027. Single chip thermal design power has passed 1 kW. Rack scale systems now draw hundreds of kilowatts. Google is already running liquid cooling on more than 80% of its AI servers.

Cooling, in one sentence, is the business of removing the heat that compute creates. Every watt you put into a rack comes back out as heat, essentially all of it, and until recently we blew it away with fans.

That no longer works. And because it no longer works, the most valuable company on earth has just made its flagship product impossible to install without a working hydraulic circuit.

Pipes. Seals. Pumps. Brazing. Water chemistry.

Which means the AI buildout now has a mandatory dependency on a set of industrial skills that has nothing whatsoever to do with semiconductors.

That is the subject of this letter, which is Part 1 of a two part series on the cooling bottleneck. I will develop the whole argument below, and explain at the end of the intro exactly what today covers and what waits for Part 2.

The one line version: the market has priced the compute. The market has started to price the power. The market has priced almost none of the plumbing, and the plumbing is now the thing that decides how fast racks actually get installed.

One last thing before we start : this letter has been updated

I finished it three weeks ago. Then a major piece of news landed on the liquid cooling industry, and I could not publish around it.

China, which accounts for roughly 43% of the world’s liquid cooled server market, published GB/T 48023-2026, its first national standard for data centre cold plate liquid cooling, taking effect 1 February 2027. It covers cold plate assemblies, quick connectors and coolant distribution units: the exact three shortages this letter is about.

I had to work it into the article and you will understand why

Now let’s get into it !

What this edition covers

• A full walk through the cooling loop, from the first micron above the silicon to the atmosphere, and where the value hides in each stage

• The 6 locks of liquid cooling, and why they actually collapse into three families

• The 3 shortages inside the first family, with three completely different industrial causes that almost nobody separates

• The impact of the absence of standardisation on the market

• What the arrival of a national standard in China means

AND most of all:

• The company that cools AI : the one Asian company that holds qualified positions across all three shortages simultaneously and why that combination is close to unreplicable

• Two counterpoint names for more concentrated exposure

• The potential risks and frictions, including the one scenario that breaks this whole thesis

• My honest opinion, my conviction level, my position sizing, and what I am doing with my own money

• UPDATE - BONUS :

  • The 123 employee company in charge of the standardisation for 43% of the global liquid cooling market

  • One industrial giant which could benefit massively from a global standardisation of the liquid cooling market

Before we start: this is Part 1 of 2

One thing about the shape of this series, because it matters for how you read today’s letter.

This letter does not contain the full picture. On purpose.

The cooling bottleneck splits into three families, and they are not variations on the same theme. They are three different businesses, in three different geographies, with three different economic models and three different types of moat.

Part 1, today, covers MAKE IT (manufacturing). The shortage that is physically stopping deliveries right now. Highest criticality, largest share of the money, most visible. Taiwan.

Part 2 covers PROVE IT (verification) and KEEP IT (maintenance). Lower criticality today, considerably stranger, far less understood, and in one case a much better business model than anything you will read about below. Japan.

If you only read Part 1, you will understand where the money is going in 2026 and 2027. You will not understand why the returns persist after that. That argument needs both halves.

Let’s start with the half that is on fire : MAKE IT

And with the company sitting on top of it, which almost nobody outside Taiwan has looked at properly.

Everyone is watching the wrong constraint

The consensus story of AI infrastructure in 2026 goes like this. Compute is the constraint. GPUs are scarce. Then memory became the constraint, because high bandwidth memory eats wafer area and nobody can make enough. Then, sometime last year, the smart money moved on to power. Transformers with five year lead times. Grid interconnection queues measured in half decades. Gas turbine order books full to 2031.

That is a good story. I have written parts of it myself. It is also, at this point, extremely well priced.

Here is what the consensus is missing.

Power and compute are inputs. Heat is an output. And outputs have to go somewhere.

Every single watt you push into a rack comes back out as heat. Not most of it. Essentially all of it. A data centre is, thermodynamically speaking, an extremely expensive electric heater that happens to do arithmetic on the side.

Which means something that I think is genuinely underappreciated:

The heat problem is not a different problem from the power problem. It is the same problem, seen from the other end.

Every gigawatt the industry fights to connect to the grid is a gigawatt that must then be removed from a building. You cannot win the first fight and lose the second one. They are the same fight.

And yet one of them has a dedicated research vertical, a decade of analyst coverage and a crowded trade. The other one is filed under building services.

And the second half has a much harder physical ceiling than people realise.

The cliff

Air is a genuinely terrible way to move heat.

Per unit of volume, water carries roughly 3500 times more heat than air. Think about what that means practically. To remove the same amount of heat, you either move a thin stream of water, or you move a hurricane.

For thirty years we chose the hurricane, and it worked fine. A normal enterprise rack draws five to fifteen kilowatts. Fans handle that easily.

Then the curve moved.

A Hopper generation AI rack drew around 40 kilowatts. Blackwell GB200 and GB300 racks landed at roughly one 120 to 140 kilowatts. The Vera Rubin VR200 NVL72 racks arriving in the second half of 2026 sit at around 190 - 230 kilowatts. The Kyber racks with Rubin Ultra, coming in 2027, are specified at around 600 kilowatts. Nvidia is openly preparing the industry for one megawatt racks.

Now place the constraint next to it. Air cooling becomes much less efficient above roughly 25 kW per rack.

We did not drift past that line. We launched over it.

And here is the part that makes it irreversible, and that I find genuinely elegant as a piece of physics :

The power you need to move air scales with the cube of the airflow. Double the air you need to move, and you pay roughly eight times the fan power. So air cooling does not fail when it becomes physically impossible. It fails much earlier, when it becomes economically absurd, because you are burning fifteen to twenty percent of your total energy budget running fans to cool the thing that the fans are also heating.

It is the thermodynamic equivalent of hiring a second employee whose only job is to carry the first employee’s paycheque to the bank.

And here is what the switch actually costs

So air stops working. What does the replacement cost?

This is the number I think matters most in the entire letter, and almost nobody quotes it.

Cooling system value is roughly 82,000 dollars per rack for liquid, against roughly 20,000 dollars per rack for air.

Initial liquid cooling investment per rack runs 50% to 100% higher than air cooling.

Four times the cooling content, per rack, in a market where rack shipments are doubling and penetration is flipping to the majority.

That is the entire bull case for every supplier in this letter, in one line. It is also why this transition is not a marginal upgrade cycle. A data centre operator switching from air to liquid is not buying a better version of what they had. They are buying a category of equipment that barely existed in their budget three years ago.

Now the part the bulls skip, and it matters for how you time this.

Revenue lags demand. Industry estimates point to the strongest earnings inflection around 2027 to 2028, not now. Orders are being placed, capacity is being built, and the profits arrive later.

Which has a consequence I will come back to repeatedly:

When the earnings inflection is two years out, the differentiator stops being who has the best technology today and becomes who has the manufacturing scale and delivery capability to serve the volume when it arrives.

The efficiency argument, and why regulators care

There is a second force pushing the same direction, and it is regulatory rather than physical.

Power usage effectiveness, or PUE, is the ratio of a facility’s total energy consumption to the energy actually delivered to the IT equipment. A PUE of 1.35 means you burn 35% on top of your compute just running the building.

The numbers here are stark:

• Air cooled facilities: PUE around 1.35

• Liquid cooled facilities: PUE below 1.15

• Best liquid deployments: below 1.05

In China, the East Data, West Computing programme is tightening PUE requirements directly. Which means liquid cooling is no longer only an engineering decision or an economic one. In the largest single national market, it is becoming a compliance decision.

Remember that. It matters enormously when we get to the standard.

Why now, and not three years ago

The interesting question is not why liquid cooling is growing. Liquid cooling is not new. IBM was water cooling mainframes in the 1980s. The technology is older than most of the people deploying it.

The interesting question is why it went from optional to mandatory in about eighteen months.

Three things changed at once :

One, the chip vendor stopped selling chips and started selling rooms. When you sold a GPU, the customer decided how to cool it. When you sell a rack level system with a fixed reference architecture, you decide. GB300 racks shipping at scale from 2026 add to that pressure.

Two, the density curve outran the building stock. Most existing floor space was designed for air: raised floors, hot and cold aisle containment, no hydraulic distribution, no structural allowance for a fully wetted rack. You do not retrofit that. You rebuild.

Three, the failure mode became catastrophic instead of annoying. When an air cooled server loses cooling, you have minutes. The thermal mass of the metal buys you time. When a direct liquid cooled GPU loses coolant flow, you have seconds. And unlike air, coolant does not just stop working. It actively destroys things.

Five millilitres

How much liquid does it take to kill a server board?

Not a litre. Not a glass. A few millilitres in the wrong place is enough to cause an immediate short circuit, corrosive damage to printed circuit board traces, or slow oxidation that degrades reliability over months before anything visibly fails.

A teaspoon.

That is the structural difference between liquid cooling and everything before it. The coolant and the hardware occupy the same physical space. There is no separation. The thing keeping your accelerator alive is also the thing capable of destroying it, and only a seal stands between the two states.

In November 2025, in a Southeast Asian facility, liquid cooling pipes burst in a high density hall. Roughly a dozen racks of GPU servers were taken out. Staff were photographed squeegeeing water down the aisle while operators raced to shut down the zone. At a few million dollars per rack, partial damage alone is an unrecoverable seven figure loss.

The Uptime Institute’s 2026 outage analysis found that 57% of major incidents now cost more than 100,000 dollars, and one in five exceeds one million.

Now add one number I will return to in detail.

A modern high density AI rack can contain more than five hundred separate disconnectable fluid joints.

Five millilitres. Five hundred joints. Three million dollars.

Those three numbers are the whole article.

And this summer, the physics got a public demonstration

If you want to know how tight the thermal margin already is, look at what happened over the last few months while nobody was writing about it.

Korea, August 2026. Record heat pushed outdoor temperatures toward 40°C. Operators like Naver Cloud and KT Cloud went onto active watch. The numbers involved are startlingly narrow: data halls are held between 18 and 27°C year round, and above roughly 30°C, GPUs can shut themselves down automatically. That is a three degree margin between normal operation and an automated service outage.

And here is the line from that reporting that stopped me: AI hardware produces five to six times as much heat as equipment in a conventional data centre. Same building, same floor, same air handling. Five to six times the load.

Virginia, May 2026. Overheating cut power to an AWS data centre in the north of the state, disrupting services.

United Kingdom, July 2026. During a heat wave, a cooling system problem shut down the University of Cambridge’s AI supercomputer, Dawn.

Three incidents, three continents, one quarter.

This is what a binding constraint looks like before anyone calls it one. Not a dramatic collapse. Just an accumulation of shutdowns that each get reported as a local operational issue.

And it is going to get worse, not better. The World Economic Forum projects that climate related disasters could add eighty one billion dollars in annual costs for data centres worldwide by 2035, rising toward one hundred sixty eight billion by 2065.

The industry response is already visible. LG Electronics became the first Korean company to receive Nvidia certification for high efficiency AI data centre cooling, with a direct to chip system, explicitly because Vera Rubin and Blackwell class chips generate heat that has to be removed fast.

Note that word: certification. It is going to matter a great deal later.

What happens if this link fails

Let me state this bluntly, because it is the core of the thesis.

If cold plates, couplings, manifolds and coolant distribution units do not arrive on schedule, the GPUs sit in boxes.

That is not hypothetical. Through 2025 and into 2026, there were repeated situations in this industry where accelerators were available, power was contracted, the building was ready, and racks could not be energised because a component of the fluid loop was on allocation. In March 2026, Reuters reported that Google was in direct discussions with suppliers about data centre liquid cooling systems as demand tightened supply across parts of the ecosystem.

When a hyperscaler starts talking directly to component vendors, that is not procurement. That is scarcity.

Think about what that means for the pace of AI itself. Not the economics. The pace.

Every model you have not used yet is waiting on a rack that has not been energised. And an increasing share of those racks are waiting on a machined copper block, a brazed heat exchanger, or a piece of moulded rubber.

The frontier of artificial intelligence is currently rate limited, in part, by the output of metalworking shops in Taoyuan and chemical plants in Osaka.

Here is my contrarian position, and I will spend the rest of this letter defending it:

The AI trade has fully priced the melt of compute demand. It has begun pricing the build of power infrastructure. It has priced essentially none of the build of thermal infrastructure, because thermal infrastructure is filed in investors’ heads under “industrials, HVAC, low growth, boring.”

The misclassification is not “obscure company nobody has found.” It is critical infrastructure filed under the wrong heading.

And I mean that literally, about a specific listed company, which I will name later in this letter. It is not a metaphor. There is an actual line in an actual sector classification that is wrong, and being wrong about it is currently worth money.

The cooling loop

Following one calorie from the silicon to the sky

Before we can talk about what is scarce, we have to look at the machine.

So here is the whole thing. I am going to walk you through the entire thermal chain, in order, following a single unit of heat from the moment it is created to the moment it leaves the building.

8 stages. Every one of them has a failure mode that can kill a rack. And by the end of it you will have the vocabulary you need for the rest of this letter, and for Part 2.

Stick with me. Watch out for three stages in particular. I will not tell you which ones yet.

First, which liquid cooling are we talking about?

Before the loop, a distinction that the whole rest of this piece depends on, and which most coverage skips entirely.

“Liquid cooling” is not one technology. It is three, and they have almost nothing in common commercially.

Rear door heat exchangers. The halfway house. The rack stays air cooled internally, with fans blowing across the components as normal, but the back door of the rack is a liquid cooled radiator that catches the hot air on its way out. Easy to retrofit, no plumbing inside the server, and it works up to maybe 50 or 60 kilowatts. Beyond that, the air inside the rack still cannot move fast enough. A transitional technology.

Immersion cooling. The radical option. Drop the entire server into a bath of dielectric fluid, a liquid that does not conduct electricity. Single phase versions circulate the fluid. Two phase versions let it boil on the hot components and condense on a coil above. Thermally it is superb, and it eliminates fans entirely. Commercially it is brutal: you need new tank shaped infrastructure rather than racks, servicing means hoisting a dripping server out of a bath, the fluids have been disrupted by the withdrawal of major PFAS chemistries, and material compatibility with every component in the box has to be validated.

Direct to chip. Also called cold plate cooling, or D2C. You leave the server in a normal rack, in a normal form factor, and you bolt a small liquid cooled block directly onto each hot component. Fluid arrives through a manifold, passes through the cold plate, and leaves. Everything else stays roughly where it was.

Here is how to think about the difference, and it is the same choice as in cars.

Immersion is throwing the whole engine into a bath of oil. Thermally brilliant. Try changing a spark plug.

Direct to chip is running coolant channels to the parts that get hot, and leaving the rest of the engine bay alone. Less elegant. Infinitely more serviceable.

Direct to chip has effectively won, and that matters enormously

This was a genuine architecture war three years ago, with credible people on the immersion side.

It is not any more.

Direct to chip won for reasons that have nothing to do with thermal performance and everything to do with operations: it keeps the standard rack form factor, it keeps servers individually serviceable, it works with existing data hall layouts, and technicians can be trained on it in weeks rather than requalified entirely.

And then Nvidia settled it. When the reference architecture for the industry’s dominant platform specifies 100% direct to chip liquid cooling with no air cooled alternative, the debate is over regardless of what anybody thinks of the physics. Every certification since has followed the same path: LG Electronics’ Nvidia certified system in July 2026 is a direct to chip design.

Cold plate cooling remains dominant because it can be integrated into existing server designs at lower conversion cost. And the market share tells you how decisively:

For example : China’s cold plate data centre market reached CNY 14.94 billion in 2025, representing 93.5% of the entire domestic liquid cooling market.

Ninety three and a half percent. In the largest single national market.

Longer term, microchannel cold plates, two phase cold plates and chip level microfluidic cooling could raise thermal capacity further.

But for this decade, and for this letter, the market is cold plate. Which is exactly why it matters so much that the Chinese standard is a cold plate standard.

As you might have understood, the loop I am about to describe is tehrefore the direct to chip loop. Cold plates, manifolds, quick disconnects, coolant distribution units. That specific bill of materials exists because of that specific architecture.

Stage 1: the first micron, where the heat is born

A modern accelerator does not produce heat evenly. This is the single most misunderstood thing about chip cooling, so let me use an analogy.

Imagine a kitchen hotplate. If you spread one kilowatt evenly across the whole surface, it gets hot but manageable. Now imagine that same kilowatt concentrated into three coin sized spots, with the rest of the plate cool. The average is identical. The physics is completely different.

That is a GPU. Certain compute blocks run at local power densities several times the chip average. Some regions exceed the equivalent of five hundred watts per square centimetre. Meanwhile the cooling system sees only the average.

The result is what engineers call thermal throttling. The chip detects a local hot spot, slows itself down to protect the silicon, and you quietly lose a chunk of the performance you paid for. Nobody gets an alarm. The cluster just runs slower than the spec sheet, forever.

Worth pausing on this one from an AI perspective. This is not a downtime problem. It is a capability problem. A cluster that throttles is a cluster that trains a smaller model, or the same model more slowly. Thermal engineering does not just protect compute. It determines how much of the compute you bought actually exists.

Stage 2 : the thermal interface material

Between the silicon and the metal that carries the heat away, there is a gap. Microscopically, two “flat” surfaces touch each other at maybe one percent of their apparent area. The rest is air, and air is an insulator.

So you fill it. A thermal interface material, usually abbreviated TIM, is a paste, gel, pad or metallic alloy a few tens of microns thick. To give you a sense of scale, a human hair is around seventy microns. So we are talking about a layer thinner than a hair, and the entire cooling performance of an extremely expensive chip depends on it staying exactly where you put it for ten years.

It usually does not.

Repeated heating and cooling makes the chip and the plate expand and contract at slightly different rates. Over thousands of cycles this physically squeezes the interface material sideways out of the gap. Engineers call it pump out, which is a delightfully honest name. Then you have an air gap again, and your hot spot gets worse.

Large multi reticle packages make this harder still, because a big silicon package physically warps under thermal load. You are trying to maintain a hair thin uniform contact layer against a surface that changes shape.

This is not academic, by the way. Nvidia originally planned a two piece heat spreader for Rubin to improve cooling efficiency, and substrate warpage forced it back to a one piece design as an interim solution. The physics I have just described is currently constraining product roadmaps at the very top of the industry.

Stage 2 and a half : spreading the heat before you remove it

Now a component that most write ups skip entirely, and which turns out to matter a great deal.

Go back to the hotplate analogy. The problem was never total watts. It was concentration: a few coin sized regions running far hotter than the chip average, while the cooling system only sees the average.

So before you try to remove the heat, it helps enormously to spread it.

That is what a vapour chamber does. Picture a sealed flat copper envelope, a few millimetres thick, with a small amount of working fluid inside and a wick structure lining the walls. Over the hot spot, the fluid boils. The vapour rushes to the cooler regions of the chamber and condenses. The wick draws the liquid back to the hot spot by capillary action, and it starts again.

No pump. No power. No moving parts. Just a phase change loop running thousands of times a second inside a sheet of metal.

The effect is that a chip with three vicious hot spots presents itself to the cold plate above as a broad, evenly warm surface. You have not removed a single watt. You have made the watts removable.

A cold plate sitting on raw silicon is trying to drink from a firehose through a straw. A cold plate sitting on a vapour chamber is drinking from a wide, shallow tray.

A heat pipe is the same physics in a tube rather than a plate. Both are, in effect, thermal superconductors: they move heat sideways hundreds of times better than solid copper, using no energy at all.

Why this got more important, not less, when the fans came off

Here is the part that surprised me.

You would think that in an all liquid, fanless architecture, passive air era devices like vapour chambers would become obsolete. The opposite is happening.

In an air cooled server, ambient airflow through the chassis mops up a lot of sloppiness. Components that were never properly attached to a thermal solution still got cooled, by accident, because air was moving past them.

Take the fans out and that safety net disappears. Every component now needs a deliberate conduction path to the loop. Which means more spreaders, more heat pipes, more vapour chambers, sitting between more components and the fluid.

Stage 3 : the cold plate

Now the metal. A cold plate is a block of copper, typically, with fluid channels machined into it, sealed with a lid, and usually nickel plated for corrosion resistance.

Sounds trivial. It is not, for one reason: the channels are getting smaller.

Thermal performance improves when you increase the surface area in contact with the fluid, which means more, thinner channels. Modern high performance cold plates use microchannel or skived fin structures where the fin thickness is measured in tens of microns. Skiving, if you have never seen it, is beautiful to watch. A blade shaves an incredibly thin ribbon off a solid copper block and folds it upright, over and over, producing hundreds of parallel fins from a single piece of metal with no joints at all.

Here is the trap.

The particle problem.

The narrower your channels, the better your cooling, and the more catastrophically a single piece of debris can ruin you. A metal particle the width of a human hair, circulating in the loop, can lodge in a microchannel and block it. That creates a local dead zone. The chip above it overheats. The GPU throttles.

And crucially, no alarm goes off. Flow rate looks normal. Pressure looks normal. Inlet and outlet temperatures look normal. You have a permanently degraded accelerator and no way to know without pulling it.

Remember this. It comes back three more times before the end of the article, and it is the reason cold plate manufacturing is not really a machining problem.

Stage 4 : the quick disconnect coupling

Okay. This is the heart of it.

Servers need maintenance. Which means you have to be able to unplug a server that has pressurised liquid running through it, in a live room, next to millions of dollars of running equipment, without spilling.

The component that does this is called a quick disconnect, usually abbreviated QD, or UQD for the Universal Quick Disconnect specification defined by the Open Compute Project, which is the industry body where hyperscalers publish shared hardware standards.

Look at the specification these things have to meet:

• Dry break. Both halves must seal themselves at the instant of separation. The target is zero drip. Not “low drip.” Zero.

• Thousands of connect and disconnect cycles without degradation. Five thousand plus is a common requirement.

• Blind mate capability. A technician pushes a tray into a rack and the coupling must find its partner and seal correctly without anyone seeing it. Some designs tolerate around one millimetre of axial misalignment, which sounds generous until you remember it must seal perfectly at every point within that tolerance.

• Machining tolerances around five hundredths of a millimetre. That is roughly one seventieth the width of a human hair.

• Near zero particle generation. Remember stage three. A coupling that sheds metal as it wears will slowly murder every cold plate downstream of it.

• Ten year service life under pressure, vibration and thermal cycling.

And here is the number I promised you earlier.

A single GB200 class rack uses more than one hundred quick disconnects. Higher density systems can exceed five hundred separate disconnectable fluid joints in one rack.

Take a moment with that, because it changes the reliability mathematics completely. If each joint has a failure probability that sounds perfectly acceptable in isolation, you multiply it by five hundred per rack, then by thousands of racks per site. Rare becomes routine.

This is exactly the same statistical trap that makes large training clusters fail constantly despite being built from individually reliable parts. And it is worth noticing that the two problems are converging: as clusters scale, the mean time between failures collapses, and an increasing share of those failures are now hydraulic rather than electronic.

Inside each of these couplings, the component that actually decides whether it holds or leaks is an elastomer seal. Fluoroelastomer or silicone, formulated to survive years of contact with glycol and deionised water, at temperature, without hardening or swelling.

A part that costs a few dollars. Protecting a rack that costs a few million.

Stage 5 : manifolds and hoses

The manifold is the vertical distribution spine at the back of the rack that splits flow to each tray. Hoses connect everything else.

Two non obvious problems here.

First, material compatibility. Polymer hoses can leach plasticisers into the coolant over time, which then circulate and deposit in your microchannels. Some polymers also allow slow permeation of water vapour through the wall, so a perfectly sealed loop can lose fluid without ever leaking.

Second, galvanic corrosion. Put copper and aluminium in the same wetted circuit and you have built a battery. The less noble metal corrodes, sheds particles, and you are back to the particle problem. This is why stainless steel grades like 316L have become the default for manifolds and couplings.

Stage 6 : the coolant distribution unit

The CDU is the organ that separates two worlds.

On one side is the technology loop: clean, filtered, chemically controlled fluid that touches your chips. On the other side is the facility loop: the building’s water, which has been through cooling towers, contains whatever the local water contains, and which you absolutely do not want near a GPU.

Between them sits a heat exchanger, usually a brazed plate heat exchanger, which is a stack of thin corrugated metal plates vacuum brazed together so that hot fluid and cold fluid flow through alternating layers without ever mixing. Add redundant pumps, filtration, sensors, and control electronics, and you have a CDU. Modern units for AI halls handle one to two megawatts, and some designs now exceed two thousand kilowatts of heat rejection.

Here is my favourite failure mode in this entire article, because it is so counterintuitive.

A perfectly sealed cooling system can still flood your data hall.

If the coolant temperature drops below the dew point of the air in the room, water condenses on the outside of every pipe. No leak. No breach. Just physics, quietly producing liquid water on the surface of equipment.

This is why the reference architectures specify a relatively warm 45°C inlet. Warm water is not a compromise. It is a safety feature. Which, when you think about it, is a lovely inversion: the cooling system is deliberately run hot to stop it from making water.

Stages 7 and 8 : chemistry and heat rejection

The fluid needs corrosion inhibitors, biocides, controlled conductivity and continuous monitoring, because water is a solvent, an electrolyte and a growth medium all at once. Then the heat finally leaves the building through cooling towers, which consume water, or dry coolers, which consume electricity.

And this last choice, guys, is where something genuinely counterintuitive happens. Something that I think is the most underrated commercial argument in the whole liquid cooling story.

The 45 degree trick, and why liquid cooling uses less water than air cooling

Everybody assumes that liquid cooling means more water. It is right there in the name. And the loudest public criticism of AI data centres is precisely about water: aquifers, drought, local communities.

The reality is close to the opposite, and the reason is that warm 45°C inlet specification I mentioned earlier.

Traditional air cooled data centres are cooled by evaporative cooling towers, which work by literally boiling off water into the atmosphere. That water is consumed and gone. But if your loop is designed to run at 45°C rather than chilled temperatures, the temperature difference against outside air is large enough that in cooler climates you can reject the heat with dry coolers, which use no water at all.

Nvidia’s own numbers on this are striking:

Annual cooling related water use can fall from roughly 2.6 million gallons per megawatt to nearly zero.

The company claims its Blackwell platform delivers water efficiency hundreds of times greater than conventional air cooled systems, and its DSX reference design for AI factories targets zero water consumption. Elon Musk has publicly endorsed the argument, which matters given xAI’s dependence on this hardware.

Nvidia also notes that cooling can account for up to 40% of a data centre’s electricity consumption, so the same architecture cuts the power bill as well.

Now, I want to be careful here, because there is a real counterargument and I would rather you heard it from me.

Berkeley Lab estimated US data centres consumed around 17.4 billion gallons of water directly in 2023, and another 211 billion gallons indirectly through power generation, with direct consumption potentially reaching 38 to 73 billion gallons annually by 2028. The indirect number is more than ten times the direct one, which means most of the water problem is really an electricity problem wearing a disguise. And xAI’s Colossus facility in Memphis reportedly draws around 1.3 million gallons of drinking water per day from a local aquifer, and has faced legal challenges and community opposition over it.

So the honest position is this. Liquid cooling does not solve the water debate. But it flips the direction of the argument entirely.

Which creates something that I do not think is priced anywhere:

Liquid cooling is no longer only a performance requirement. It is becoming a permitting requirement.

An operator who cannot promise near zero water draw increasingly cannot get a site approved in a water stressed region. Which means the cooling loop stops being a component purchase and becomes part of the licence to build.

Hold onto that. It comes back when we look at the company.

Note one final thing about these last two stages, because it comes back shortly.

Everything in stages one to six is a thing you buy once. A plate, a coupling, a manifold, a unit. Volume business, component margins, capacity constrained.

Stages seven and eight are things you keep buying forever. Chemicals consumed continuously, monitoring, service visits, replacement inhibitor packages.

Same loop. Completely different business.

But how much is the market worth ?

Most sector write ups put market sizing at the end, as a formality. I am putting it in the middle, because in this case the market forecast is the thesis.

Penetration is flipping to the majority

That is not growth. It is a majority flip. In 2025 the default AI chip was air cooled. In 2026 it is liquid cooled.

And China is moving faster still. Domestic liquid cooled server penetration is projected to reach 37% in 2026, exceed 50% in 2027, and approach 82% by 2030.

Eighty two percent. In four years.

The market is compounding at rates that do not look real

• Globally, the liquid cooled server market exceeded 8.7 billion dollars in 2025, up about 62.3%.

• Shipments reached roughly 896,000 units, up 55.2%.

• China accounted for 42.9% of that global market, shipped about 243,000 units, or 64.7% of the entire Asia Pacific market, and its liquid cooled data centre market reached CNY 15.98 billion in 2025, up 45.2% YoY, projected to reach CNY 23.25 billion in 2026 and CNY 47.04 billion by 2028.

Roughly a tripling in three years, in the single market that has just standardised.

And penetration is only half the story. Watch the two multipliers stacked on top of it.

• Multiplier one: the number of racks is exploding. TrendForce expects shipments of Nvidia’s GB and VR rack scale solutions to double in 2026. For 2027, even allowing for possible delays to Kyber NVL144, they still project overall GPU rack shipments growing more than 30% year on year. Add AMD, which from the second half of 2026 is pushing its Helios rack scale solution integrating CPU, GPU and high speed interconnect, with large scale shipments expected in 2027, followed by MI450 and then MI500 positioned against Rubin Ultra.

Every one of those platforms has fully adopted liquid cooling.

• Multiplier two, and this is the one almost nobody has picked up. Because Vera Rubin adopts a fully fanless, all liquid cooled design, liquid cooling is spreading beyond the GPUs and CPUs to the CX9 network interface cards, the busbars and power boards, and the optical transceiver modules.

• And there is one more, which I have not seen in a single published forecast: the memory.

  Once you remove the fans, components that were previously cooled by ambient airflow inside the chassis have no airflow at all. So they each need their own fluid path. Taiwanese suppliers are already describing memory liquid cooling integration as a distinct new product category arriving in the second half of 2026, and HBM stacks are, as anyone following that market knows, getting taller, hotter and more numerous every generation.

Think about what that does to the addressable content.

It is no longer “how many chips get a cold plate.”

It is “how much of the rack becomes wetted.”

Same rack, same customer, same install. Several times the thermal content, because components that were previously air cooled by association now each need their own fluid path. And this is not a one off uplift. It is a multi year sequence of new products, each one arriving as another component runs out of air.

So you have three things compounding at once: more racks, higher penetration per rack, and more wetted components per rack. That is why the cooling content per rack is climbing far faster than the rack count.

And here is the number that tells you how much runway is left:

The gap, which is where the money actually is

Now put the demand curve next to the physical reality of what you just read about the loop.

Eight stages. Dozens of qualified components. Micron tolerances. Vacuum brazing furnaces. Elastomer compounds validated over ten years.

Rack shipments double in twelve months. A qualified production line takes eighteen to thirty months to build.

That gap does not close by wanting it to close. It closes at the speed of the slowest qualified supplier.

And Lombard Odier put the supply side problem more plainly than anyone: the market relies on a relatively small pool of certified suppliers, creating a constrained ecosystem struggling to meet rising demand.

A small pool of certified suppliers. In a market flipping to majority adoption in one year, doubling its unit base, and expanding its content per unit.

That imbalance has a multi year duration, and the companies inside that small pool are going to earn returns that look nothing like the industrial multiples the market has assigned them.

But “the supply chain is tight” is where most analysis of this sector stops, and it is not good enough to invest on. Tight where? Tight why? A constraint you cannot locate is a constraint you cannot own.

So let’s find out exactly where, in that chain, the pressure actually sits.

6 bottlenecks. Actually, 3 families.

You have now seen the whole machine. So the obvious question is: which part of it is short?

The answer is not “all of it.” That would be useless. When I finished the research I had six distinct bottlenecks: six specific reasons why liquid cooling cannot be deployed as fast as it is demanded. Here they are, mapped onto the stages you just walked through:

Then I sat with that list for a while, and I realised I was looking at it wrong.

These are not six parallel problems. Ask a different question. Ask: what is the customer actually afraid of, in each case?

It is not the same fear every time. There are exactly three.

Can you make enough of them? Can you prove they hold? Can you keep them alive for ten years?

Three questions. Three moments in the life of a component. Three completely different businesses. And five of the six bottlenecks fit inside them without a single one left over.

MAKE IT. PROVE IT. KEEP IT.

MAKE IT contains the seal, the copper and the furnace. What is scarce here is qualified capacity. Criticality: 5 out of 5. This is the only family that is physically stopping deliveries today.

PROVE IT contains the proof of tightness. What is scarce here is verification capacity, and it produces the least understood consequence in the sector. Criticality: 4 out of 5.

KEEP IT contains the loop chemistry. What is scarce here is approved supplier status on a live system. Criticality: 3 out of 5 today, and rising fast as the installed base ages.

The three families are also a timeline

Here is the thing I did not see until I had written all three out, and it is the reason this series is structured the way it is.

These are not three parallel markets. They are three consecutive phases in the life of the same asset.

MAKE IT is day zero: can you produce the part at all. PROVE IT is day one: can you certify it before it ships. KEEP IT is day two through day three thousand six hundred: can you stop the loop from destroying itself.

Which means they do not peak at the same time.

Read that right hand column, guys. It is not an accident.

The build phase of this industry is Taiwanese. The verification and maintenance phases are Japanese. Two completely different industrial cultures, two completely different sets of shareholders, and almost no overlap in who covers them.

This is why the series has two parts, and why I would not recommend reading only one.

Part 1 tells you where the revenue is right now. Part 2 tells you where it goes when the building slows down and the installed base takes over.

Anyone who invests in this sector on the basis of MAKE IT alone is implicitly betting that the buildout never matures. That is a bet, and it may be a fine one for three years. It is not the whole picture.

And the sixth one was never a bottleneck at all

The botteleneck n°6 “absence of a standard” is not a fourth family. It is the mechanism that makes the other three permanent.

A qualification costs twelve to twenty four months of testing. In a stable industry, that cost amortises over decades. Certified capacity becomes abundant, suppliers multiply, margins collapse. This has happened to every mature industry without exception.

Here, the specification resets with every chip generation. So the qualification never amortises.

Scarcity in this sector is not an accident of growth. It is regenerated continuously, by construction.

This idea is the spine of the whole series. It appears in every section below, it explains every margin you are about to see, and it comes back in Part 2 in a form you will not expect, because it turns out the absence of a standard does something to the verification layer that it does not do anywhere else.

Hold that thought until the end.

Today: MAKE IT

This piece is about the first family. The one that is binding right now.

Three shortages, three completely different industrial causes, and one company that holds qualified positions across all three of them.

That last point is worth dwelling on for a second, because it is genuinely unusual. Most suppliers in this sector answer one shortage. A handful answer two. Solving all three at once requires a combination of skills that essentially nobody set out to acquire deliberately, which is exactly why so few companies have it and why it cannot be assembled quickly by anyone who wants in.

You have the machine. You have the map. Now let’s go to the three places where it is actually blocked.

3 shortages, 3 different causes

Now we get specific.

Here is the observation that structures this whole section, and it is one I have not seen made anywhere.

“There is a shortage of liquid cooling components” is a useless statement. There are three shortages. They involve three different parts, three different industrial disciplines, three different geographies, and three different reasons why capacity cannot simply be added.

Lumping them together is why most analysis of this sector is shallow. Separating them is how you find the company.

Let me take them in order of how much value they carry.

Shortage 1 : the cold plate

What is actually missing: not copper, not machine tools. Clean workshops.

The world has plenty of copper. It has plenty of CNC machines. It has plenty of competent machinists.

What it does not have is factories that can simultaneously do all of the following, at a volume of hundreds of thousands of units per month:

• Machine or skive copper features at the scale of tens of microns

• Braze under vacuum without introducing voids or contamination

• Plate for corrosion resistance without changing channel geometry

• And maintain semiconductor grade particle discipline throughout

That last one is the killer, and it is the one everyone underestimates.

Go back to the particle problem from stage 3. A single metal chip left in a channel destroys the part, silently, months later, in the customer’s data hall. Which means a cold plate line is not a machine shop with clean habits. It is closer to a clean room that happens to contain metalworking equipment. Filtered assembly, controlled deburring, rinse and dry protocols, particle counting.

That is a very specific industrial culture: high precision, high volume, low cost, and clean, all at once. It takes years to build and it cannot be bought.

Here is the thing that genuinely delighted me when I worked it out.

There was one industry that spent 25 years developing exactly that combination of skills, for completely unrelated reasons, in a brutal low margin business that nobody respected and nobody covered.

They did not know they were building a strategic capability. They were just trying to survive an annual price down.

Hold that. It is the answer to the whole article.

The evidence that this shortage is real is not in the commentary, it is in the capex. One Taiwanese player is scaling liquid cooling module production from two hundred thousand to one million units per month. A Japanese group has committed roughly fifty five billion yen to new liquid cooling module plants across the Philippines, Thailand and China, targeting liquid cooling module sales above one hundred billion yen by fiscal 2027 and four hundred billion by fiscal 2030.

When everyone announces a fivefold capacity increase simultaneously, that is not optimism. That is catch up.

And here is the number that proves the barrier is real, from a Taiwanese thermal executive speaking publicly in May 2026, in what I think is the single most useful quote in this whole sector.

He was talking about vapour chambers, the passive spreaders from stage two and a half, which sit inside this same shortage because they demand the same precision copper discipline.

Barriers to entry for thin, entry level thermal products are relatively low, he said. Plenty of companies can make those, and plenty are trying.

But the 3mm thick vapour chambers used for GPUs are extremely difficult to manufacture, and only two to three companies worldwide currently hold qualification.

Two to three companies. On earth. For a component going into the highest volume compute buildout in history.

That is what a qualification barrier looks like when someone inside the industry quantifies it, and notice the shape of it. The barrier is not “can you make a vapour chamber.” It is “can you make this specific one, to this specific spec, and prove it to the customer.” Thin ones are a commodity. Thick GPU grade ones are an oligopoly.

Same factory. Same material. Same process family. Completely different competitive structure, decided entirely by whether you cleared qualification.

Criticality: 5 out of 5. Largest share of the bill of materials, tightest capacity, longest ramp.

Shortage 2 : the coolant distribution unit

What is actually missing: not the design. Furnaces, and fifty years of temperature curves.

The CDU decomposes into two scarce industrial capabilities, and neither of them is electronics.

• The brazed plate heat exchanger. A stack of thin corrugated stainless plates, joined in a vacuum furnace with a filler metal that melts and wicks into every contact point by capillary action. Get the temperature profile, the vacuum quality, the plate geometry or the filler chemistry slightly wrong, and you get a unit that either leaks or performs poorly, and you will not know which until it is tested.

  This process cannot be reverse engineered from a datasheet. It is embodied knowledge, accumulated over thousands of production runs.

  And critically, in the CDU this component is the safety barrier. It is the physical wall between dirty facility water and the clean fluid touching your accelerators. If it fails, contaminated water enters the chip loop and you lose the hall.

Nobody buys that part on price. Ever.

• The pump. Not exotic technology. But a pump that runs continuously for a decade, quietly, with redundancy, in a loop where stopping for four seconds destroys hardware, is a fundamentally different product from a pump that runs a swimming pool.

Here is what makes this shortage different from the first one:

You can add a CNC machine in weeks. You cannot add a vacuum brazing line in weeks. It is capital intensive, slow to commission, and slow to qualify.

This is the one shortage in the entire series that keeps a genuinely irreducible physical component. Even with instant certification, the furnace takes as long as the furnace takes.

Criticality: 5 out of 5. Hardest to expand, and it is the safety critical component.

Shortage 3 : the seal

What is actually missing: not the coupling body. The elastomer compound, and its ten year validation.

Anyone with a CNC machine can produce a metal coupling body. The scarcity sits in the sealing element and in the qualification of the assembly around it: the compound formulation, the cure, the ageing behaviour in glycol at temperature over ten years, the surface finish of the groove it sits in.

Why does adjacent industry not simply fill the gap? This is the question I kept asking, and the answer is elegant.

Because everyone else’s requirements are softer.

Industrial hydraulics accepts a drip. Medical devices need few cycles. Automotive parts are sealed once at the factory and never touched again. Aerospace does very low volumes at very high cost.

The AI data centre wants all of it simultaneously: thousands of cycles, blind mate, zero drip, zero particles, decade life, at millions of units, at a price that does not break the rack budget.

There was no existing industry with that exact profile. So there was no existing capacity.

The result was a genuine squeeze. During the worst of the shortage, spot prices for quick disconnects reportedly rose several fold, and Western incumbents were slow to expand because they had watched decades of false starts in liquid cooling and did not believe the demand curve. Certified supply has historically been concentrated among a handful of Western specialists, with Asian entrants only recently passing certification.

Criticality: 4 out of 5. Highest unit count, lowest unit cost, and the single most supply constrained item in the stack for most of the last two years.

The thread that runs through all three

Three shortages. A workshop culture, a furnace, a rubber compound. On the surface they have nothing in common.

But look at what is actually blocking each one :

In all three cases, the machine can be bought and the qualification cannot.

That is the MAKE IT family in one line. What is scarce is not manufacturing. It is qualified capacity: a production line that a customer has validated, on a component that is certified, with a demonstrated reliability history behind it.

Which means the asset you want to own is not a factory. It is a portfolio of qualifications.

And that changes what you are looking for entirely.

One loose thread, which I am leaving deliberately.

If the scarce good is qualification rather than manufacturing, then a fairly obvious question follows, and I want you to hold it in your head for the rest of this letter.

Who performs the qualification?

Somebody has to actually verify that a part holds. Not the customer, who is not in the factory. Not the supplier’s own word, because nobody accepts that on a component that can flood a data hall.

There is an answer, it involves a machine, and the machine turns out to sit behind every single one of the three shortages you just read about. That is Part 2, and it is the section of this research that surprised me most.

Why the shortage does not fix itself

Now the part that turns a supply squeeze into an investment thesis.

Normally, shortages are self correcting. Prices rise, capacity is added, prices fall, margins normalise. Anyone who has invested in semiconductors or shipping knows this cycle intimately and knows how it ends.

So the obvious question is: why has this one not corrected? And more importantly, when will it?

My answer is that it structurally cannot, for as long as one condition holds. And that condition is bottleneck six.

The absence of a standard

Yes, the Open Compute Project has published a Universal Quick Disconnect specification, and yes the major vendors have aligned to it. Parker, Danfoss, CPC, Stäubli and Gates all describe products built to it, with plugs and sockets designed to be interoperable across approved manufacturers.

But alignment is not the same as commoditisation.

Cold plate geometries differ by chip package. Manifold layouts differ by rack. Pressure ratings, fluid chemistries, flow rates and mechanical interfaces vary by customer and by generation. And the true de facto standard is not written by a standards body at all. It is written by whoever publishes the reference architecture, and it changes every time the compute roadmap moves.

Four consequences follow, and each one is worth money:

No buffer stock is possible. Parts qualified for one generation do not serve the next. You cannot inventory your way out of a shortage, which means the shortage is permanent rather than transitory.

Requalification never ends. A new supplier needs twelve to twenty four months of testing before it can ship in volume. Even when a customer desperately wants second sourcing, they cannot have it quickly.

The learning curve resets. Every eighteen months, yields start over. The efficiencies you earned on the last generation do not carry.

Therefore pricing does not commoditise.

That last point is the whole investment case, so let me box it.

The economic law that explains every margin in this industry:

Commoditisation requires standardisation. Standardisation requires stability. This industry has no stability, by design, because the pace of the compute roadmap makes stability impossible.

Therefore the normal gravitational pull toward zero margin does not operate. The qualified incumbent keeps pricing power for exactly as long as the roadmap keeps moving.

Which raises the obvious follow up: who is the qualified incumbent? Because in a structure like this, that phrase is not descriptive. It is the entire asset. Keep reading.

There is a genuinely lovely historical parallel here. Adam Smith’s pin factory got cheap because the pin stopped changing. Every efficiency gain compounded on a stable design. Ford’s Model T got cheap for the same reason: “any colour so long as it is black” was not stubbornness, it was the price of the learning curve. Standardisation is the engine of deflation, and it always has been.

This industry has the opposite structure. The product changes faster than the learning curve can compound.

Which is terrible for the customer, and quietly wonderful for the qualified supplier.

The honest limit of that argument

One qualification, because I would rather give you the exception myself than have you find it later.

Commoditisation is not absent here. It is arriving product by product, from the bottom up. A component appears, only a few can make it, margins are excellent. Then that particular specification stabilises just long enough, competitors qualify, and the margin collapses while the rest of the loop stays protected.

The evidence is already visible. Thin thermal products have low barriers and many entrants, while thick GPU grade vapour chambers have two or three qualified suppliers worldwide. Same category, opposite economics. And in mid 2026 a Taiwanese supplier publicly walked away from a flagship platform’s cold plate business, on the explicit grounds that competition would be intense and margins razor thin.

A cooling supplier looked at the most visible contract of the cycle and decided the margin was not worth the capacity. That is not a market where commoditisation has been suspended. It is one where commoditisation is chasing the industry up the value chain, one component at a time.

So the accurate version of the law is narrower than the one I gave you, and better for it. The specification reset does not protect every product. It protects the frontier. Whoever holds qualification on the newest, hardest, least standardised part of the loop keeps pricing power. Whoever is still selling last generation’s hard part is already being competed away.

Which changes what you are looking for. You do not want a company with a big share of a component. You want one that has demonstrated it will abandon a component when the margin goes.

And one more force, which I find almost poetic

Fear.

Go back to the Southeast Asian hall in November 2025. A dozen racks, gone in an afternoon. Now think about the procurement manager who signed off on that supplier.

The behavioural result is entirely predictable. Buyers who have seen water on the floor do not switch suppliers to save eight percent. Industry analysts have explicitly noted that cloud providers deepen relationships with existing qualified vendors precisely because of historical leakage incidents. The Open Compute Project’s own design goal is an annual cold plate and coolant loop failure rate of no more than 0.3 percent, which sounds tiny until you multiply it across thousands of plates in a single site.

Fear is the strongest switching cost there is. Stronger than contracts, stronger than price, stronger than relationships.

And it accrues entirely to whoever was already qualified when the industry got scared.

Updated section: China has just proved standardisation is possible

Everything above is still true. It is the operating condition of the liquid cooling market in Taiwan, Japan, Korea, the United States and Europe, today, as you read this.

However, it stopped being true in exactly one country that represents 40% of the global liquid cooling market, one week after I posted this letter, so I had to add it.

The news

On 1 February 2027, China’s first national standard for data centre liquid cooling will take effect: GB/T 48023-2026, Technical Specifications for Cold Plate Liquid Cooling System of Data Center.

It sets technical requirements and testing methods covering system design, component specifications, hydraulic calculations, testing and verification, deployment, and maintenance. Cold plate assemblies, quick connectors and coolant distribution units are all explicitly included.

Which means it covers all three of my shortages. The standard covers the entire MAKE IT family.

It was led by Sugon Data Energy, a Beijing company developing liquid cooling since 2011, which has led or participated in five national standards, three local, seven industry and more than twenty group standards. It also manufactures and sells the products the standard governs.

Why now

Rapid adoption exposed a weakness anyone in the supply chain will confirm privately: fragmented specifications across components, coolants and interfaces. Coolant formulations, quick disconnect durability, cold plate corrosion rates and interoperability all lacked consistent requirements, which meant every deployment was effectively a custom engineering project.

That is exactly the fragmentation I described two sections ago as the profit engine of this sector. From the supplier’s side it looks like a moat. From the customer’s side it looks like a tax. Somebody was eventually going to attack it.

And cold plate technology already accounts for more than 90% of China’s liquid cooling market, so this is not a standard for a niche. The stated purpose is to lower integration friction as deployments move from customised projects toward higher volume systems involving multiple vendors, which is a one sentence definition of commoditisation.

What it changes for the Chinese market

Four effects.

Entry gets easier. Certify once against a published document, instead of twelve to twenty four months of customer specific testing.

Buyers can create competition. Interoperable components mean an operator can buy from A what it bought from B.

Costs genuinely fall. Previously the specification reset every eighteen months and the learning curve restarted from zero. A stable standard lets yields compound for the first time.

And the basis of competition changes. You no longer win by being the best engineer. You win by being the largest, cheapest manufacturer.

In one line: the Chinese market shifts from “who can do this” to “who can do this cheapest.” Margins compress. Volumes explode.

And the volumes are not small: China’s liquid cooled data centre market goes from CNY 15.98 billion in 2025 to CNY 47.04 billion by 2028, with domestic penetration rising from 37% in 2026 toward 82% by 2030.

This does not apply to the global market

I need to be precise here, because getting it wrong makes the rest of this letter incoherent.

The industry that is standardising is Chinese liquid cooling. Not global liquid cooling. Taiwanese suppliers selling to US hyperscalers are not subject to it.

And the direct spillover is limited. Two channels, neither transformative alone. Chinese suppliers gain a credential rather than just a low price, which helps them in international tenders. And global suppliers selling into China have to comply, which slowly spreads tooling and test protocols.

So the economic law from the previous section has not been repealed outside China. It still holds everywhere I am about to recommend.

But it gives you a working example

This is why I rewrote the letter rather than adding a footnote.

Until this document existed, standardisation of liquid cooling was a theory. Something that would happen eventually, in some unspecified way, on a timeline nobody could name.

It is now a demonstrated event, with a date, a scope, an author and observable consequences.

China has not standardised the global market. It has shown you, concretely, what happens to the rest of it when the time comes, and how quickly.

The Open Compute Project is already moving the same direction, with its Universal Quick Disconnect specification progressing toward genuinely interchangeable parts and Meta completing hose evaluation for blind mate connectors in January 2026. The pressure is identical in both blocs: customers are tired of paying the fragmentation tax.

Treat 1 February 2027 not as a compliance date, but as a dress rehearsal.

So if it happens globally, who wins?

Standardisation does not destroy value. It relocates it. Away from anyone whose margin depended on fragmentation, and toward two places: whoever writes the rules, and whoever has the scale to win a commodity market on unit cost.

That second one is a real, nameable company, and it is the reason there is a bonus name in this letter.

If standardisation stays a Chinese phenomenon, it is a mid sized business with excellent margins.

If it goes global, it is the structural winner of the entire sector, because when engineering stops being the differentiator, the largest qualified manufacturer takes the market.

I will introduce it after the main recommendation, and I will treat it as what it is: a scenario play, not a base case.

Because none of this changes what I was looking for in the first place. So let me go back to that.

So what are we actually looking for?

Put the three shortages and the standardisation problem together, and the profile of the ideal company falls out almost mechanically.

You want a company that:

• Already holds qualified positions across multiple parts of the loop, because the qualification is the asset and more of it is better

• Has decades of process knowledge in precision metalwork, because that is the part that cannot be bought

• Can prove its moat in the accounts, not in a press release

• Is architecture agnostic, so it does not depend on any one accelerator winning

• And is not yet correctly categorised by the market

There is one company that fits all five.

I want to be precise about how unusual that is. I screened the entire listed thermal complex in Taiwan, Japan, Korea and China. Plenty of companies fit two criteria. Several fit three. One fits all five, and it is not the largest, not the most covered, and not the one that comes up when you search for AI cooling stocks.

Update

Given what has happened with the Chinese standard, I have decided to add two complementary names alongside the main one.

First, the company in charge of standardisation for 43% of the global market. It is not a recommendation and I will explain why, but after what I have just shown you about where value flows when an industry standardises, leaving it unnamed would have been indefensible.

Second, a company that could benefit enormously if this scenario plays out beyond China. We now know standardisation of this market is possible, because it has just happened somewhere. If it spreads, the advantage shifts decisively toward scale, and one company has more of it than anyone in the sector. That is a scenario play rather than a base case, and I will treat it as one.

The company

Everything below the line is for paying subscribers :

• The company that cools AI : the one Asian company that holds qualified positions across all three shortages simultaneously and why that combination is close to unreplicable

• Two counterpoint names for more concentrated exposure

• The potential risks and frictions, including the one scenario that breaks this whole thesis

• My honest opinion, my conviction level, my position sizing, and what I am doing with my own money

• + UPDATE | BONUS :

  • The 123 employee company in charge of the standardisation for 43% of the global liquid cooling market

  • One industrial giant which could benefit massively from a global standardisation of the liquid cooling market

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We uncover Asia’s most overlooked investment opportunities: hidden world leaders quietly controlling a vital bottleneck of the global tech supply chain, companies whose world first technologies no competitor can replicate, and strategic players no headline ever mentions. Undervalued today, indispensable tomorrow: that’s where the real upside hides.

Today, we talk about the second wave. The one nobody is modelling. AI agents need four times more CPU cores per gigawatt than training clusters do, and every one of those sockets drags a different set of suppliers behind it.

How I found this one

I was not looking for it. I want to be honest about that.

I was three days into the advanced packaging piece, buried in CoWoS capacity numbers, trying to work out how many accelerators the world can physically assemble in 2027. It was 1 a.m. My coffee was cold. My girlfriend had given up on me for the evening hours earlier.

And I hit a line in a TrendForce note that stopped me completely.

Not slowed me down. Stopped me.

The line said that in March 2026, two companies entered the server CPU market in the same month. One was Nvidia, a GPU company. The other was Arm, an intellectual property licensor that had spent thirty five years refusing to build its own chips.

I read it again. Then I sat back and thought: what on earth do these two know that I don’t?

Because think about it for a second, guys. Nvidia sells the most profitable product in the history of semiconductors. Arm has a business model so clean it gets taught in strategy classes: collect royalties, own no factories, carry no inventory risk. Why would either of them voluntarily walk into the server CPU market, a category Wall Street has filed under “mature, low growth, structurally boring” for over a decade?

That question cost me the next eleven days.

Here is the number that reframed everything.

Arm estimates that a traditional AI data center needs about 30 million CPU cores per gigawatt. In the AI agent era, that number goes to 120 million CPU cores per gigawatt.

Four times. Same gigawatt. Same building. Same power contract.

That is not a forecast adjustment. That is a different machine.

The first AI wave was about buying accelerators. The second is about whether the rest of the server can keep up.

And somebody has to build it.

What this edition covers

• Why the CPU never actually left, and the physical reason an accelerator without one is not a slow accelerator but an inert piece of glass

• The ratio that decides everything: Intel’s CFO confirmed on the record that data center deployments have already moved from 1 CPU for 8 GPUs to 1:4, and could reach 1:1

• Why Meta signed a multi billion dollar deal for CPUs it does not make, and what that tells you about who is actually short

• Two chips, two completely different bills of materials: the row by row breakdown that explains why this wave does not enrich the same suppliers as the GPU wave

AND most of all:

• The four overlooked Asian suppliers sitting directly on this chokepoint, three in Taiwan, one in Shanghai, none of them names you will hear on CNBC

• The honest bear case on each

• My own positioning, and what I am actually doing with this

Take your time with the first half. The names at the end only mean something if you understand what comes before them.

Let’s go.

PART I. THE PROBLEM

Why an AI accelerator physically cannot run without a CPU, and why nobody noticed

Before diving into why the demand for CPU is gardually booming, first you need to understand the physics.

The CPU never actually left

What each one is for

Let me set the physics before the finance.

A CPU, central processing unit, has few cores. Tens, sometimes a couple of hundred. But each core is extraordinarily sophisticated. It predicts branches, meaning it guesses which way an “if” statement will go before it knows the answer. It executes instructions out of order to avoid waiting. It sits on top of a deep cache hierarchy. It is built to take one unpredictable sequence of instructions and finish it as fast as physics allows.

A GPU, graphics processing unit, has thousands of cores. Each one is simple. They all execute the same instruction on different data at the same time, a model the industry calls SIMD, single instruction multiple data. It is built for throughput, not for latency.

Think of it as the difference between a Formula 1 car and a freight train.

The F1 car takes one passenger and gets there absurdly fast, on any track, including the corners, including the parts of the route nobody mapped in advance. The freight train takes ten thousand passengers and gets there with extraordinary efficiency, but only if the rails are already laid, and only if everyone is going to the same place.

A neural network is, mathematically, matrix multiplication repeated billions of times. Everyone going to the same place. Rails already laid.

That is why the GPU won. Not because it is better. Because the workload happened to be shaped like a freight route.

And here is the part that matters for your money, which I will keep coming back to. Somebody has to physically build the other half of that machine. Somebody designs it, somebody sockets it, somebody feeds it memory. Four Asian companies do most of that, and I will name them at the end.

What the GPU physically cannot do

Here is the part that gets skipped in almost every piece written about AI infrastructure.

An accelerator is a coprocessor. It is not a processor.

It cannot boot a machine. It cannot read a file from a disk. It cannot open a network socket. It cannot receive a request. It cannot decide what to do next. It cannot schedule its own work. It has no operating system.

Every single thing that is not matrix multiplication is done by the host CPU:

• Loading data from storage

• Decompressing and preprocessing it

• Building batches

• Launching the compute kernels on the accelerator

• Managing memory transfers between system memory and accelerator memory

• Running the operating system, the containers, the scheduler

• Running the network stack and the storage stack

• Deciding what happens next

This is not a supporting role. It is the role of everything else.

Go back to Adam Smith’s pin factory for a moment, because it is the cleanest illustration I know. Smith’s point was not that specialisation makes each worker faster, though it does. His point was that specialisation makes each worker dependent. The man who does nothing but sharpen the pin cannot make a pin. He can only sharpen. Remove any one station and the factory does not slow down proportionally. It produces zero pins.

The accelerator is the most specialised worker ever built. That is exactly why it is the most dependent.

The starving GPU

There is a failure mode engineers know well and investors almost never hear about. It is called a starved GPU.

If the host CPU cannot prepare data fast enough, the accelerator sits idle. It has nothing to multiply. You bought a thirty thousand dollar part and it is waiting for a slower chip to hand it something to do.

On badly tuned workloads, utilisation figures get genuinely embarrassing.

So the honest question about any AI cluster is not “how many accelerators does it have.” It is “how well is it fed.”

Henry Ford understood this in 1913. An assembly line does not move at the average speed of its stations. It moves at the speed of the slowest one. Everything upstream of the bottleneck accumulates inventory. Everything downstream sits idle. Adding capacity anywhere except the bottleneck makes the problem worse, not better, because it increases the queue.

The AI industry has spent three years adding capacity downstream of the bottleneck.

Ford also learned the second half of that lesson, and it is the one investors care about. The money in a constrained system does not accumulate at the glamorous station. It accumulates at the slow one. Remember that when we get to the names.

The dependency is structural, not preferential

Now the part that matters for your portfolio.

An accelerator without a host CPU is not a slow accelerator. It is an inert piece of silicon. It cannot boot, cannot read a file, cannot receive a request, cannot schedule its own work.

Every AI server ever shipped contains one, because a server without one would not turn on.

Remove the host CPU from an AI server and you do not get a slower AI server.

You get a very expensive paperweight.

If host CPUs disappeared tomorrow, the AI industry does not slow down.

It stops.

Not slows. Stops.

This is a hard dependency. It is not a design preference. Nobody can engineer around it, because there is nothing to engineer around. The CPU is not competing with the GPU for a job. It is doing a different job that must also be done.

And a different job means a different chip, built on a different architecture, assembled from different parts. Which means the companies that get rich from rising CPU demand are not the companies that got rich from rising GPU demand. They are a separate set of names, almost all of them in Asia, and I will show you four of them.

Which means the CPU attach rate is not a forecast anybody argues about.

It is an engineering constraint.

The only open question, the only genuinely open question in this entire piece, is the ratio. How many accelerators per host CPU?

Hold that thought. We come back to it, and it turns out to be worth about a hundred billion dollars.

Keep this in mind as we go. None of what follows is about CPUs replacing GPUs. That framing is nonsense and I do not believe it. This is about what happens when the thing that feeds the GPU becomes the constraint, and about the fact that it is not built from the same parts. Different parts means different suppliers. Different suppliers means the money does not land where you think it lands.

The blind spot

So if the dependency is structural and unavoidable, why has nobody been talking about this?

I want to be careful here. The market was not stupid. It was rational, and then the ground moved. There are five reasons, and they stack.

The price tag captured all the attention

A high end accelerator costs tens of thousands of dollars. Its host CPU costs a few thousand.

Put them side by side on a bill of materials and one of them screams and the other whispers. Attention followed face value, not function.

This is salience bias, and it is very old. Ask anyone what a house costs and they will quote you the purchase price. Ask them what the foundations cost and they will look at you strangely. The foundations still hold the house up.

The ratio reinforced the illusion

Today’s AI data centers have operated at CPU to GPU ratios of roughly 1:4 to 1:8.

Eight accelerators, one or two CPUs. By unit count and by dollar value, the CPU is a minority passenger in the node. Hard to write a thesis about the minority passenger.

The training phase hid the need

This is the most important one, and it is the one I nearly missed.

Training is batch work. It is predictable. Data is preloaded. Execution is regular. Very little orchestration is needed. It is the single workload profile in which the CPU matters least.

And 2023 to 2025 was almost entirely training.

So the entire industry built its intuition of what an AI server looks like during the exact period in which the CPU was least relevant. That intuition became the default model. Every capex forecast, every supply chain model, every sell side note inherited it.

That intuition is now expiring.

This is not a market that made an error. It is a market that generalised correctly from a sample that has stopped being representative. Which, if you have read any philosophy of science, is the oldest trap there is. It is Hume’s problem of induction wearing a Bloomberg terminal. Every swan you have ever seen is white, therefore all swans are white, therefore your risk model has no term for black ones.

The category was misfiled

Server CPUs sit in the “enterprise computing” bucket. Mature. Low growth. Low multiples. No excitement.

Nobody separated out AI host CPUs from that bucket. So a fast growing slice of AI capital expenditure has been getting recorded, quarter after quarter, in the wrong column.

The number exists. It is just filed under the wrong heading.

And I want to be precise about this, because it is the core of the whole thesis: the misclassification is not “obscure company nobody has found.” It is critical infrastructure filed under the wrong heading. Those are completely different mispricings, and the second one is much more durable, because a correction requires the market to change a category, not just to notice a name.

And the misfiling does not stop at the chip. It runs all the way down. If the market has the CPU in the wrong bucket, then everything that plugs into the CPU is in the wrong bucket too. That is where four companies have been sitting, quietly, in plain sight.

The ownership changed, so the growth went invisible

Last reason, and the subtlest.

When you track a market, you track its incumbents. You look at Intel to understand server CPUs, the way you look at Boeing and Airbus to understand aircraft.

But the growth here is not going through Intel. It is not even going through x86.

Look at Intel to judge the server CPU market and you are looking at the wrong place entirely.

The demand was never absent. It was mislabelled, dwarfed in attention by the chip sitting next to it, and masked by a training phase that is now ending.

Why I went looking here

Honestly? Because I was tired of writing about the same six companies.

But there is a method underneath the frustration, and it is the same one every edition of this newsletter uses. When a system is under strain, the interesting question is never “what is the most valuable component.” It is “what is the most constrained one.”

Liebig figured this out in 1840, studying crop yields. A plant does not grow according to the nutrient it has most of. It grows according to the nutrient it has least of. You can flood a field with nitrogen and get nothing, if what the soil lacks is potassium. Economists later stole the idea and called it the law of the minimum. It is the reason a barrel holds water only up to its shortest stave.

The AI industry has been pouring nitrogen on the field for three years.

I went looking for the potassium.

And what I found is that four companies in Asia are sitting on it. I will show them to you in part seven. First, you need to understand why this happened now and not five years ago.

PART II. THE SHIFT

What agentic AI changed, and what it is worth

This is the heart of the article. Take your time with this section.

What an AI agent actually is, and why 2026 is the year it exploded

So why have I just made you read all of that about a chip nobody talks about?

Because its demand is about to explode. And it is about to explode because of exactly one thing : Agentic AI.

Those two curves, the agentic curve and the CPU curve, are not neighbours. They are the same line drawn twice. And once you understand how an agent actually works, mechanically, step by step, you will not be able to unsee the connection.

So let me be precise about what agentic AI actually is, because the phrase has become one of those things people nod at without checking, and the whole thesis lives in the details.

What it is

Start with the definition, because everything else follows from it.

An AI agent is a software system that is given a goal rather than an instruction, and that decides for itself what sequence of steps to take to reach that goal, using external tools, over many turns, with limited human supervision.

Four things in that sentence are doing work, and each one matters.

A goal, not an instruction. You do not tell an agent what to do. You tell it what you want to be true when it is finished. “Fix this bug” rather than “open file X and change line 40.”

It decides the sequence itself. Nobody wrote the steps in advance. The model chooses the next action based on what it has learned so far, which means the path is different every time and cannot be known before the task starts.

It uses external tools. This is the part that turns a language model into an agent. It can search, query a database, call an API, read and write files, and execute code. Without tools it can only talk. With tools it can act on the world.

Keep that list in mind. Search, database, API, files, code. Not one of those five things happens on an accelerator.

Limited human supervision. It runs unattended between checkpoints, which means something has to decide what happens next, without a human in the room.

Now compare. A chatbot answers a question: you ask, it responds, the exchange ends. An agent completes a task. The difference is not one of degree. It is one of kind.

A chatbot produces text. An agent produces actions. And producing actions is exactly the CPU’s job.

Text comes out of the accelerator. Actions do not. Every action an agent takes, every tool it calls, every file it opens, every line of code it runs, happens on the other chip.

I will develop that properly in a moment, once we have seen just how far agentic AI has exploded. Because the size of the explosion is what turns a technical detail into an investment thesis.

What it is for, and why enterprises went from curiosity to spending in eighteen months

Here is the commercial logic, and it explains the adoption curve better than any technology argument.

A chatbot makes an employee faster. An agent removes the employee from a step entirely.

That is a completely different line on a budget. One is a productivity tool, and productivity tools compete against other productivity tools for a software budget measured in tens of dollars per seat. The other substitutes for labour, and it competes against a salary.

For a chief financial officer, that is not an incremental improvement in a software category. It is a change in the cost structure of the business.

Which is why the buying decision moved. Chatbot purchases were made by IT departments out of software budgets. Agent deployments get approved at board level, against headcount lines, with a completely different order of magnitude available to spend.

Where it is actually working today. Coding agents that take a ticket and open a pull request. Customer support agents that read the account, check the order system, issue the refund and write the email. Research agents that search, read, cross reference and produce a briefing. Clinical documentation agents that reduce documentation time by 30% to 42% and save clinicians up to 66 minutes a day.

Notice what those four have in common. Every one is a workflow rather than a question. Multi step, tool using, previously requiring a person to sit in the middle and move things along.

Anything shaped like that is an agent’s natural territory, and it turns out an enormous share of white collar work is shaped exactly like that.

And that is the part reshaping the labour market. The tasks most exposed are not the ones people assumed three years ago. It was widely predicted that AI would come for routine manual work first. Instead it is coming for coordination work: the reading, checking, cross referencing, form filling, ticket routing and status chasing that sits between the interestsing parts of a professional job.

Those tasks were never automated before because they require judgment at every step and the steps are never the same twice. Traditional software cannot do that. An agent can, because it decides the sequence as it goes.

I am not going to tell you where that ends, because I do not know and neither does anyone else honestly claiming to. What I can tell you is that it is why the spending curve looks the way it does. Enterprises are not buying agents because the technology is impressive. They are buying them because the alternative line item is payroll.

That is the demand pressure sitting behind every number in the next section.

The numbers behind the explosion

Now the scale, because this is where it stops being a technology story and becomes a capital expenditure story.

The single most striking figure comes from Gartner:

40% of enterprise applications will include task specific AI agents by the end of 2026, up from less than 5% in 2025.

Read that again. An eightfold increase in a single year.

The direct market, meaning software and platforms sold as agentic AI, sits at roughly $9.9 billion in 2026 and is forecast to grow more than 40% a year, reaching around $57 billion by 2031 on one estimate and $139 billion by 2034 on another, at a compound annual growth rate of roughly 40.5%. Venture funding in North America alone has exceeded $40 billion.

But that direct market number badly understates the infrastructure consequence, and I want to be clear about why.

The agentic software market measures what enterprises pay for agent products. It does not measure the compute those agents consume. Worldwide AI spending is forecast at roughly $2.59 trillion in 2026, up about 47% year over year. Agents are a rapidly growing share of what runs on that infrastructure, and as we are about to see, they are a disproportionately expensive kind of workload to run.

A ninefold increase in a software market is interesting. A ninefold increase in a workload that consumes four times more of one specific component per gigawatt is something else entirely.

And here is the connection almost nobody has drawn

Everything above is well covered. You can read a version of it in any technology publication this month.

Here is what is not covered.

The agentic explosion and the CPU shortage are the same event.

Not correlated. Not adjacent. The same event, observed from two ends of the supply chain.

Track the two curves against each other and they are indistinguishable.

• Enterprise applications embedding agents go from under 5% to 40% across 2025 and 2026.

Across those same months :

1.Meta went outside

In April 2026, Meta signed a multi billion dollar, multi year deal with AWS to deploy tens of millions of Graviton5 cores, becoming one of the five largest Graviton customers worldwide. AWS vice president Nafea Bshara confirmed the contract runs for at least three years and that the majority of capacity will be deployed in the US.

A company spending a hundred and thirty billion dollars a year went outside to buy general purpose compute from a competitor. Meta’s head of infrastructure Santosh Janardhan called diversifying compute sources “a strategic imperative.”

You do not use the word imperative about something you can easily get.

2.Customers tried to buy the entire supply

Amazon CEO Andy Jassy, in his 2025 shareholder letter: two large AWS customers asked whether they could buy all of AWS’s Graviton instance capacity for 2026. Not a large allocation. All of it. Jassy added that the AWS chips business now runs at over $20 billion annually, and that if AWS sold those chips to third parties as well, the run rate would be around $50 billion.

3.The contract structure changed

Reuters reported that Intel and AMD are securing longer term server CPU agreements with Chinese customers, and Intel confirmed it has signed ten long term deals. Similar to the memory industry, the agreements can span three to five years, with some contracts including both volume and pricing commitments and others focusing solely on volume.

Three to five year contracts. Price locked. In a market everyone calls mature.

That is not a product cycle. That is what the memory industry looks like at the start of a shortage regime, not at the end of one.

4.Prices moved, and so did lead times

• Server CPU prices have risen 10% to 20% since March, with consumer CPUs up 5% to 10% over the same period. Analysts expect another round of 8% to 10% increases in the second half of 2026. (Intel Core Ultra 7 270K Plus went up about 16%, the Core Ultra 5 250K Plus about 15%)

• Delivery lead times that once ran one to two weeks now stretch eight to twelve weeks, and some orders will not ship for six months. HP and Dell flagged worsening shortages in late February.

And then the datapoint I keep coming back to, because it is genuinely absurd.

Intel has restarted production of its 13th and 14th generation Core CPUs for the Chinese OEM and DIY markets. Chips launched in 2022 and 2023. The reason is that they support DDR4 memory, and DDR5 has become too scarce and too expensive. Reports even describe a significant increase in stocks of 10th, 12th, 13th and 14th generation CPUs.

Think about what that means for a second.

The most technologically advanced industry on earth, in the middle of the largest capital expenditure boom in its history, is restarting four year old products because it cannot get memory.

That is not a company making a strange decision.

That is a supply chain screaming.

When a supply chain screams, somebody is on the receiving end of the pricing power. It is almost never the company whose name is on the product. It is the one three layers down who nobody thought to look at.

The industry did not decide that CPUs were interesting again. It discovered that the machine required to run an agent is not the machine it had spent three years building, and it responded the only way it could: by building the missing half.

Every one of those things has been reported. As far as I can tell, almost nobody has reported them as the same story.

The reason they are the same story is mechanical, and it comes down to the specific shape of the loop I described a page ago. An agent, structurally, demands something from a data center that a chatbot never did, and that something does not come from the chip everybody is watching.

I am going to walk through exactly why, step by step, over the next sections. Then I am going to show you where the money lands, which is not where you would guess.

How it actually works

Under the hood, an agent runs a loop. Four steps, repeating.

Reason. The model is given the goal, the history of what has happened so far, and a list of tools it may use. It produces a decision about what to do next.

This step is the accelerator’s. Matrix multiplication, exactly what a GPU exists to do.

Act. It calls a tool. That might be a web search, a database query, an API call, a file operation, or executing a piece of code it just wrote.

And that is exactly what a CPU does. Opening a network socket, querying a database, running code in a sandbox: none of it is matrix multiplication, and none of it can happen on an accelerator.

Observe. The tool returns a result. The result gets parsed, validated, and appended to the agent’s working state.

CPU again. Parsing, validating, managing state.

Repeat. With the new information in hand, the model reasons again.

And the decision about whether to repeat at all, and with what, is control logic. CPU.

The loop runs until the agent decides the goal has been met, or until it hits a limit.

Twenty iterations for a simple task. Fifty or a hundred for a complicated one. A coding agent asked to fix a bug in a real codebase might read forty files, run the test suite six times, and rewrite the same function three ways before it is satisfied.

Count the italics above. One line out of four belongs to the accelerator.

Inference already changed the nature of the work

Training is batch work, as I said. Inference is a live service.

Requests arrive out of order. They have different lengths. They have different priorities. They must be received, tokenised, dynamically batched, routed to the right model, cached, filtered, and streamed back.

Read that list again. Every item on it is sequential, branch heavy, unpredictable work.

Every item on it is CPU work.

So the ratio moves mechanically as the industry shifts from training to serving. That shift alone would have been a story.

But it is the small version of the story.

Agentic AI changes the shape, not just the scale

Here is the thing that took me eleven days to properly understand, and it is why I asked you to hold the shape of that loop in your head.

A chatbot request is one round trip. The CPU receives it, prepares it, the GPU computes, the CPU returns the answer. The orchestration ratio is low. One trip out, one trip back.

The agent loop is a completely different object. Reason, act, observe, repeat. Twenty times. Fifty. Sometimes a hundred, for one single user task.

And here is the part almost nobody works through: every single turn of that loop exits the accelerator.

Between two compute passes, here is what actually happens, step by step:

One row out of seven.

The matrix multiplication has become one step in a loop where most of the steps are not matrix multiplication.

This is not more inference. It is a different shape of work.

A chatbot request is one round trip. An agent is a loop. Every turn of that loop exits the accelerator, does something a GPU physically cannot do, and comes back. Scale the number of agents and you do not just scale inference. You scale everything that happens between the inference calls.

And everything that happens between the inference calls runs on a chip with a completely different architecture, a completely different bill of materials, and a completely different supply chain. That supply chain is overwhelmingly Asian, it is barely covered by anyone in the West, and it is what the back half of this article is about.

And this is not my speculation. TrendForce describes the coordination layer that schedules sub tasks, routes tool calls, passes data between sub agents, and evaluates whether the original request has been fulfilled as falling squarely on the CPU, which is what makes orchestration a CPU intensive workload.

There is also a second, less discussed source of load. When agents are trained through reinforcement learning, every action the agent takes must be evaluated, which places additional load on the CPU.

So agents are CPU hungry when you train them and CPU hungry when you run them.

The joint Meta and AWS statement announcing the Graviton deal put it about as plainly as a corporate press release ever does:

“While GPUs remain essential for training large models, the rise of agentic AI is creating massive demand for CPU intensive workloads: real time reasoning, code generation, search, and orchestrating multi step tasks.”

Read that again. That is the two companies with the largest AI infrastructure budgets on earth telling you, in writing, where the new demand is going.

Amdahl’s law comes back to collect

Here is where it gets, I think, genuinely beautiful. And a bit frightening.

In 1967, Gene Amdahl formulated a law about parallel computing that every computer science student learns and most promptly forget. It says: the speedup you can get from parallelising a program is limited by the fraction of that program which cannot be parallelised.

If 10% of your work is inherently sequential, then even with infinite parallel hardware, you can never go more than ten times faster. The serial fraction becomes the wall. Add a million processors and you hit the same wall, just more expensively.

Now apply that to agentic AI.

The inference step parallelises magnificently. That is the whole point of a GPU.

The orchestration step does not parallelise at all. You cannot execute step seven of an agent loop before you know the outcome of step six. The agent has to think, then act, then observe, then think again. That sequence is irreducibly serial. It is serial in the same way a conversation is serial, or a chess game, or a proof.

Which means the more you accelerate the inference, the larger the proportional weight of the part you cannot accelerate.

This is not a temporary inefficiency that better engineering will remove. It is a structural property of the workload.

And it has a name in economics too, which is where it stops being an engineering curiosity and starts being an investment thesis.

In 1966, William Baumol observed something odd about string quartets. It takes exactly as many musicians exactly as long to perform a Schubert quartet in 1966 as it did in 1826. Zero productivity growth in a century and a half. Meanwhile manufacturing productivity had exploded.

Baumol’s conclusion was counterintuitive and correct: as an economy automates the automatable, the unautomatable parts become proportionally more expensive. Not absolutely more expensive. Proportionally. Live music, education, healthcare and haircuts eat a larger and larger share of GDP precisely because they resisted the productivity revolution happening everywhere else.

That is exactly what is happening inside an AI server right now.

The more capable agents become, the larger the share of their work that cannot be accelerated. And therefore the more valuable the thing that does the unacceleratable part.

Baumol’s cost disease, running inside a rack.

And the academic literature has now measured it. A November 2025 paper titled A CPU-Centric Perspective on Agentic AI found that tool processing on CPUs can account for up to 90.6% of total latency, that throughput bottlenecks can stem from CPU core count, coherence and synchronisation, and that CPU dynamic energy consumption can reach 44% of total dynamic energy at large batch sizes.

Ninety point six percent of latency.

Let that sit for a moment. In the workload that everyone says is the future of AI, the chip that nobody is counting can account for nine tenths of the time to answer.

That is not a rounding error. That is the whole problem.

Now hold Baumol’s logic one step further, because this is the whole investment case in one line.

The ratio is the variable that decides everything

Now we can put a number on it. And the sourcing matters here, because it comes from four independent directions and they agree.

• Intel, on the record. On the Q1 2026 earnings call, Intel said the ratio of CPUs to GPUs deployed in data centers could tighten by as much as 1:1 in agentic scenarios. CFO David Zinsner described deployments as having already moved from 1:8 to 1:4.

Already moved. Past tense. That is not a forecast, that is a disclosure.

• TrendForce. Expects CPU to GPU ratios to shift from 1:4 to 1:8 toward 1:1 to 1:2 in agentic AI deployments.

• Arm. About 30 million CPU cores per gigawatt for traditional AI data centers, going to 120 million cores per gigawatt in the agent era.

• Intel’s CEO, at JP Morgan. On 19 May 2026, at the 54th JP Morgan technology conference, Lip-Bu Tan described conversations with frontier model companies who told him CPU demand in agentic workloads was critical, particularly for agent orchestration and workload optimisation. Some of them, he said, told him it was four to one. Four CPUs for one GPU.

I want to be careful with that last one, because it is a CEO with an incentive quoting unnamed customers. Treat it as the aggressive end of the range, not as the base case.

But even the conservative version of this is a violent change. Do the arithmetic yourself. It is simple and it is the most useful thing in this article.

Same fleet of accelerators. Eight times the CPU demand.

This is the single number to track. Not AI capex. Not GPU shipments. The accelerator to socket ratio in announced rack architectures. Watch it every quarter and you will know before the market does whether this thesis is working.

And every single socket in that table drags a bill of materials behind it. A designer. A package. A connector. Eleven memory interface chips, as you will see. Multiply the right hand column by that content and you start to understand why I have been buying four names most people have never heard of.

The installed base effect

One more mechanism, quickly.

Millions of accelerators are already deployed. Every one of them needs feeding, supervising, and eventually replacing.

Demand follows the installed base, not the new order book. And the installed base only grows.

What this is worth, in units and in dollars

Now the money.

Start with the demand side.

At its Advancing AI event, AMD CEO Lisa Su raised the company’s estimate for the AI server CPU total addressable market to $220 billion by 2030, up from the $120 billion estimate provided in May. Su attributed the increase to the rapid adoption of AI agents, which require significantly more CPUs to orchestrate workloads across AI clusters.

Stop and look at that revision.

A hundred billion dollars of total addressable market, added in a single quarter, by a company that has every reason to be conservative on stage. Not because the technology changed. Because the workload changed shape.

The sell side moved with it.

Morningstar expects AMD’s revenue to grow at a 40% compound annual rate between 2026 and 2030, driven by the rise of agentic AI, which it says will require significantly more server CPUs to orchestrate AI workloads. Susquehanna lifted its price target to $500 from $450. UBS raised its target to $730 from $700 citing expectations for robust server CPU growth. Jefferies raised its target to $640 from $515, saying the event reinforced AMD’s leadership in server CPUs.

Now the derived content, which is the number nobody is modelling.

A host CPU does not arrive alone. It arrives with system memory, often more than a terabyte per node. It arrives with a physical socket carrying thousands of contacts. It arrives with a dedicated power delivery stage. It arrives with retimers and interface silicon. It arrives having been designed by someone, packaged by someone, and tested by someone.

The addressable content per socket is a large multiple of the price of the processor itself.

That multiple is where the four companies live.

And I want to be explicit about why that matters, because it is the whole reason this article is not simply “buy AMD.” The derived content of a CPU socket does not overlap with the derived content of an accelerator.

Different memory, different mounting, different power, different interfaces. Rising CPU demand therefore enriches a set of suppliers that rising GPU demand largely bypassed. Four of them are listed in Asia. None is a household name.

PART III. THE SUPPLY CHAIN

Where this demand physically lands, and why it does not land where you think

Two chips, two bills of materials

This is the pivot of the entire article. If you read one section carefully, read this one, because everything in part seven falls out of it mechanically.

And I am going to go deeper into the engineering here than I normally would. Not to show off. Because the investment case only holds if you understand why these two chips need different parts, and that reason is architectural. It is not a preference, not a convention, not something a clever designer will unify next generation. It comes from a decision made at the very first line of each chip’s specification, and everything else follows from it.

Where the two architectures actually split

Start at the root, because everything downstream is a consequence of it.

A processor designer has a fixed budget of transistors and a fixed power envelope. The first question is how to spend it. There are broadly two answers, and they are mutually exclusive.

The latency answer. Spend the budget on making one instruction stream finish as fast as possible. That means large caches, so data is close by. It means out of order execution, where the chip reorders instructions on the fly to avoid waiting on a slow one. It means branch prediction, where the chip guesses the outcome of an “if” before it knows the answer and speculatively executes down that path, throwing the work away if it guessed wrong. It means deep pipelines and enormous amounts of control logic.

Count the transistors in a modern CPU core and only a small minority are doing arithmetic. Most of them exist to keep the arithmetic units fed and to hide the fact that memory is slow.

The throughput answer. Spend the budget on arithmetic units and accept that any individual operation will be slow. Do not bother with out of order execution. Do not bother with deep caches. Instead, when one group of threads stalls waiting for memory, immediately switch to another group. The industry calls this latency hiding through massive multithreading. You do not make the wait shorter. You make sure something else is always ready to run during the wait.

If that sounds abstract, picture two restaurants.

The first is a small kitchen with one brilliant chef. Everything he might need is within arm’s reach: the knives, the herbs, the stock, the pans. He anticipates. He has already started reducing the sauce before you ordered it, because most people order the sauce. When he guesses wrong he throws that pan away and starts again, and he still comes out ahead. That kitchen is optimised so that your dish arrives as fast as physically possible. That is a CPU, and the reaching, the anticipating and the throwing away are exactly what caches, branch prediction and speculative execution are.

The second is a canteen with two hundred cooks and one enormous pass. Nobody anticipates anything. If a cook is waiting on the fryer, he simply steps aside and another cook takes his place at the counter. No individual dish is fast. But the pass never stops moving. That is a GPU, and stepping aside for the next cook is exactly what massive multithreading means.

The GPU took the second answer. That is the whole design.

Everything else follows from that one choice.

The CPU hides latency by keeping data close, so it needs a large, low latency, directly attached memory pool. The GPU hides latency by having enormous parallelism, so it needs raw bandwidth above all else and tolerates high latency comfortably.

The CPU runs unpredictable code with sudden bursts of activity, so its power draw swings violently on nanosecond timescales. The GPU runs regular code across thousands of cores, so its power draw is comparatively smooth and predictable.

The CPU is the machine’s supervisor and must connect to everything, so it needs an enormous number of general purpose input and output lanes. The GPU talks mostly to its own memory and to its siblings, over a private link.

Three architectural differences. Three completely different sets of components. Let me take them one at a time.

And keep the destination in view as we go. Every one of these three differences resolves into a component that exists on the CPU side and simply does not exist on the accelerator side. Each of those components has a dominant supplier. Each of those suppliers is in Asia. That is the entire investment case, and the next six sections are the proof.

Memory: capacity versus bandwidth

What the accelerator uses : HBM, high bandwidth memory. A stack of eight to twelve memory chips bonded directly against the compute die, drilled through with TSVs, through silicon vias, which are simply vertical copper columns letting the layers talk to each other. The stack sits on an interposer, a slab of silicon acting as very fine wiring, because a normal circuit board cannot route connections that densely. Spectacularly fast. Physically permanent. And, because of how it is built, comparatively small: a high end accelerator carries a few hundred gigabytes at most.

What the CPU uses : DDR5, the fifth generation of standard server memory, in pluggable modules. Slower per connection, but available in enormous quantity. An AI node commonly carries more than a terabyte of it.

Why the difference ? Back to the kitchen. HBM is the small fridge under the counter: everything in it arrives instantly, which is what you want mid service, but you cannot make it bigger without rebuilding the kitchen. DDR5 is the walk in store room at the back. Slower to reach, enormously bigger, and you can add shelves whenever you need to.

The accelerator needs speed because it is consuming a stream of numbers. The CPU needs capacity because it is holding the entire system: the operating system, the containers, the data being staged, the agent’s working state, the caches. That is a capacity problem, and you cannot build a terabyte out of HBM at any sane price.

There is one more difference that matters commercially. Because CPU memory is pluggable rather than bonded, it needs buffer chips on each module to keep the electrical signal clean across many chips. A register clock driver, or RCD, cleans up the address and command signals. Data buffers do the same for the data lines.

The newest standard, MRDIMM, multiplexed rank DIMM, goes further: it serves two banks of memory chips alternately, roughly doubling effective bandwidth, and carries one RCD plus ten data buffers per module.

Eleven chips per module, on more than a terabyte per node, is a content number. Content numbers are where suppliers make money.

And here is the squeeze nobody has priced.

These are two different downstream industries. But upstream they are fed by the same wafers, in the same fabs, by the same three companies. Every wafer converted to HBM is a wafer no longer producing standard memory, and HBM consumes far more silicon per usable gigabyte.

So the agentic CPU wave pulls hard on conventional memory at precisely the moment the industry converted its capacity toward HBM.

Picture a bakery with a fixed number of ovens. For years it made bread. Then wedding cakes became fashionable and enormously profitable, so it converted most of the ovens. Cakes take longer, use more of the oven, and one mistake ruins the whole thing rather than one loaf.

Then everybody wanted bread again.

There is no bread. Converting the ovens back takes months and building new ones takes years. That is the memory industry in 2026, and it is why Intel is restarting chips from 2022 in China, purely because they run the older memory standard.

This is not a memory story that happens to touch CPUs. It is a CPU story that runs directly through memory.

And that row of the bill of materials has an owner. One listed company sits in exactly that squeeze, and it just printed a gross margin higher than TSMC’s. Keep reading.

Mounting: soldered versus socketed

What the accelerator uses : It arrives soldered permanently onto a carrier board at the factory, using BGA, ball grid array, where tiny solder balls under the package melt and fuse to the board. It ships as one sealed unit, in an OAM or SXM module, the open and Nvidia proprietary form factors.

What the CPU uses : An LGA socket, land grid array: a frame holding thousands of tiny spring contacts that press against flat pads on the underside of the processor when it is clamped down. Recent server sockets have gone from roughly four thousand contacts to over seven thousand.

Why the difference ? Three practical reasons.

One motherboard design has to serve dozens of product variants with different core counts and prices. Data centers replace failed processors, and a socketed part is a fifteen minute repair rather than a new board. And the processor and the board can be built, tested and shipped separately, by different companies, in different countries.

Why it is genuinely hard ?

Every one of those thousands of contacts is a tiny spring that must hold reliable pressure for years while the processor heats to eighty degrees and cools again, thousands of times. Silicon, plastic and the circuit board all expand at different rates, a mismatch engineers call CTE, coefficient of thermal expansion, and it works the contacts back and forth microscopically on every cycle. It is the same reason bridges have those metal comb joints in the road surface, except the bridge heats and cools several times an hour and there are seven thousand joints instead of two.

Some contacts also carry high speed signals and must be nearly electrically invisible. Others carry several hundred amps through a millimetre scale spring without overheating.

That is materials science, precision stamping and plating chemistry, in a part manufactured by the million at a price of a few dollars.

And the content is inflating. More cores means more memory channels, more high speed lanes and more power pins. Every additional contact is content for whoever makes the socket, and the socket maker is not Intel, not AMD, and not Nvidia. There are only a handful of companies on earth that can build this part at volume, and one of them is in this article.

Power delivery: the same watts, a different problem

What the accelerator uses : Power regulation built into its own module, designed by the accelerator maker as part of a closed system.

What the CPU uses : A VRM, voltage regulator module: a dedicated circuit on the motherboard, bought from a separate supplier, that converts twelve volts down to roughly one volt and delivers several hundred amps.

Why the difference is not just packaging : The shape of the demand is different.

The accelerator’s load is smooth. Thousands of cores running the same instruction produce a steady draw. Size the supply once and you are done.

The CPU’s load is violent. Because its code is branchy and unpredictable, the chip can go from nearly idle to every core at full width within a handful of clock cycles, with current jumping by hundreds of amps in under a microsecond. Engineers call that rate of change di/dt, and it is the number that makes CPU power delivery a specialist problem.

It is the difference between a factory and a nightclub. A factory draws a large but predictable load all day. A nightclub is quiet for hours and then everybody orders at once. Same total consumption, completely different infrastructure problem.

When demand jumps that fast, voltage sags, because no regulator responds instantly. You have seen the household version: somebody switches on an old vacuum cleaner and the lights dim. Now imagine that happening thousands of times a second, and that a dim lasting a microsecond too long does not annoy you, it crashes the machine.

The countermeasure is a multiphase design: sixteen to twenty four small converters working in staggered rotation so their output smooths out, each with its own power stage and inductor, orchestrated by a controller chip. Plus capacitors placed as close to the socket as physically possible. Buckets of water kept right beside the fire, because the fire brigade cannot arrive within a microsecond.

And it scales with sockets, not with accelerators. A rack with 256 CPUs and no accelerators, which Nvidia now sells, still needs 256 of these.

Which is the pattern you should now be seeing in every section: as the CPU count rises, an entire category of components rises with it that the accelerator wave never touched. Nobody in the West models this layer. Almost everybody who supplies it is listed in Taipei, Keelung or Hsinchu.

Interfaces: the CPU is the connection point

What the accelerator uses : A proprietary private link to its siblings. NVLink for Nvidia, Infinity Fabric for AMD. One job: move data between accelerators very fast.

What the CPU uses : PCIe, Peripheral Component Interconnect Express, the general purpose connection standard of the entire industry, to reach everything else: storage, network cards, management controllers and the accelerators themselves. A modern server CPU offers well over a hundred PCIe lanes, and that number grows every generation.

Why the difference ? Draw an AI server as a diagram and the CPU sits at the centre. Accelerators talk to each other. The CPU talks to everything.

Why the newest generation changed the component landscape ?

Each PCIe generation roughly doubles the speed. Gen6 also changed how information is encoded, moving from NRZ, two voltage levels meaning one and zero, to PAM4, four levels packing two bits into every signal.

Imagine communicating across a valley by shouting one of two words: yes or no. Even through wind, the listener can tell them apart. Now agree to shout one of four words instead, to send twice as much per shout. In a quiet room, fine. Across the valley, two of them start sounding identical.

Meanwhile the journey keeps getting harder. Insertion loss, the attenuation a signal suffers on the way, hits higher frequencies hardest. A signal crossing a motherboard, a socket, a connector and a cable arrives at a small fraction of one percent of its original strength. Roughly the difference between someone speaking directly to you and someone speaking from the far end of a long stone corridor with a door half closed.

That gap created a component category: chips whose entire job is to receive a degraded signal and make it usable again. A redriver is analogue, a very sophisticated amplifier that boosts the signal without understanding it. A retimer is digital: it recovers the data, decides what each symbol actually was, and regenerates a clean signal from scratch.

A megaphone and an interpreter. The megaphone is instant but cannot rescue a word that was genuinely lost. The interpreter can, and takes a moment longer.

The same silicon also serves CXL, compute express link, which runs over PCIe and lets a CPU share memory coherently with attached devices. Upside for the same suppliers rather than a competing standard.

And notice what this does to the layer after it. Every one of those lanes, on every socket, has to be validated at full speed before the part ships. Signal integrity does not just create a component category. It creates test time, and test time has become a bottleneck of its own with a very clear world leader behind it.

Test: why high core count is expensive to verify

One row that gets no attention at all, and probably deserves its own article.

Why it differs ? Test cost is essentially machine time, and machine time scales with what has to be checked.

A high core count server CPU is one of the worst cases in the industry. Every core must be exercised. Every cache checked. Every memory channel and every high speed lane validated at full speed. And because these parts are binned, sorted into product grades by the speed and voltage they achieve, testing is not pass or fail. It is a full characterisation across a range of operating conditions.

It is the difference between checking that a hotel’s front door opens and inspecting all two hundred and eighty eight rooms, plus the plumbing in each, plus how each behaves in a heatwave and a cold snap, then grading the building accordingly.

Add chiplets, where a processor is assembled from several separate dies, and every one has to be verified as a KGD, known good die, before assembly. You crack every egg into a separate bowl first, because one bad egg found afterwards costs you the whole cake.

The accelerator has its own version of this, and HBM stack testing is famously slow. The point is not that one is worse. The point is that both queue for the same ATE, automated test equipment, and both get harder every generation.

Cache: the difference that explains the die

One last note, because it explains something about cost that surprises people.

Cache is fast memory built directly onto the chip, made of SRAM, static random access memory. A CPU is dominated by it: server processors carry hundreds of megabytes.

Why so much? Because the CPU hides memory latency by keeping data close, and cache is that strategy physically realised. The GPU spends its die area on arithmetic units instead, because it hides latency through parallelism rather than proximity.

Here is the awkward part. SRAM has essentially stopped shrinking with each new manufacturing generation, while logic transistors keep getting smaller. So with every generation, cache occupies a larger share of an expensive leading edge chip.

Picture an office building where architects keep fitting more desks into the same floor area. But the staircases and corridors cannot be made narrower, because people are still the same size. With every redesign, circulation space takes a larger share of the floor plan, and you are paying prime rent for stairwells.

That is a direct reason chiplets exist: put the compute on the newest, most expensive process and the cache on an older, cheaper one, then bond them together.

Which means the cache problem is one of the causes of the advanced packaging demand described in part five. The memory that will not shrink is quietly driving the assembly bottleneck.

The table that explains everything

PART IV. THE COMPANIES

Four Asian suppliers sitting directly on the chokepoint

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Prologue

If you are new here, welcome to Asia Next. We uncover Asia’s most overlooked investment opportunities: hidden world leaders quietly controlling a vital bottleneck of the global tech supply chain, companies whose world-first technologies no competitor can replicate, and strategic players no headline ever mentions. Undervalued today, indispensable tomorrow: that’s where the real upside hides.

Today, we talk about advanced packaging.

Not the chip. The thing that holds the chip together.

A few Days Ago, Nvidia Paid $1.5 Billion In Advance For Glue

Let me start with what happened last Thursday.

On July 23, 2026, Amkor Technology announced a multi year strategic partnership with Nvidia. Under the agreement, Nvidia provides a $1.5 billion prepayment to expand Amkor’s advanced packaging and test capacity in the United States, principally in Arizona. The two companies will align long term roadmaps on high density interconnects and next generation heterogeneous integration.

Amkor shares jumped 17% in extended trading. The stock is up 63% year to date.

Now read that first sentence again, slowly.

Nvidia did not sign a supply contract. Nvidia did not place an order. Nvidia handed a supplier one and a half billion dollars in cash, up front, before receiving anything at all.

Companies do not prepay for commodities. You do not wire money in advance for something you can buy from four vendors next quarter. You prepay when the thing you need is scarce, when the queue is long, and when losing your place in that queue would cost you far more than the prepayment.

The most valuable company in the history of capitalism just paid cash in advance to secure the ability to glue its own chips to memory.

This is not a partnership announcement. It is a hostage payment.

And here is the thing that turned a news item into nine days of research for me. I went looking for context, expecting to find that this was a one off, an aggressive move by an aggressive company.

It is not a one off.

Over the last fourteen months, four other major actors have each done their own version of this. One of them signed a decade long commitment. One of them committed the largest foreign direct investment in American history. One of them spent ten billion dollars building an alternative supply chain rather than keep depending on the one that exists. And one of them quietly deleted a million units from its own product plan, not because demand fell, but because it could not get a slot.

I will show you each of those in turn, at the point in the argument where it actually proves something, because dumping them all in an intro turns evidence into noise.

For now, hold one idea.

The most sophisticated buyers on Earth are not competing for chips.

They are competing for assembly.

And nobody can explain what any of it means

Which brings me to why I actually wrote this edition, and I want to be honest about the motivation because I think a lot of you feel the same way.

For the last eighteen months, every AI supply chain conversation has been drowning about advanced packaging and mysterious acronyms.

But what is even advanced packaging ?

Let me confess something mildly embarrassing.

When I started this research, some stubborn corner of my brain still pictured “packaging” as, you know, packaging. A chip. A little anti static bag. Some bubble wrap. A label with a barcode on it. Off to the post office, next day delivery, sign here please, mind the fragile sticker.

If you pictured anything remotely similar, congratulations, we were both spectacularly wrong.

There is no box. There is no parcel. Nobody is wrapping anything. No van is involved at any point.

The real definition :

Advanced packaging is what physically connects the GPU to its memory (HBM) . An AI accelerator isn’t one chip, it’s a compute die surrounded by stacks of high-bandwidth memory, and advanced packaging is the layer that wires them together into a single component. They have to be connected because the GPU can’t work from memory alone: every token it generates requires reading the model’s weights, so the chip spends most of its time waiting for data rather than calculating. Feeding it fast enough takes thousands of connections running in parallel, packed millimetres apart, far finer than a normal circuit board can route. Without that layer, the GPU and the memory are two separate parts that can’t talk to each other quickly enough, and the accelerator simply doesn’t work.

What actually happens is this. A machine picks up a piece of silicon thinner than a sheet of paper. It aligns that piece to another piece within two microns, which is roughly one thirty fifth of the width of a human hair. It presses them together with precisely controlled force while heating only the joint and not the surroundings, because heating the surroundings would ruin everything. Then it does that two dozen more times, on a structure the size of a dinner plate, which is actively bending while the work happens because its different materials expand at different rates.

Then the whole thing has to stay flat. Permanently. While dissipating enough heat to boil a kettle.

And one stray dust particle in the wrong place destroys a five figure assembly.

It is not shipping. It is surgery.

Honestly, “packaging” might be the single worst piece of branding in industrial history. The word tells you nothing, sounds like cardboard, and has probably cost more investors more money through sheer under-curiosity than any technical term in the sector. If this step had been christened “die integration” or “silicon assembly” back in the 1970s, I suspect half of you would already own these stocks.

Different packaging technologies exist : CoWoS. CoWoS-S. CoWoS-R. CoWoS-L. CoPoS. CoWoP. SoIC. SoW. SoW-X. EMIB. EMIB-M. EMIB-T. Foveros. Foveros Direct. FOPLP. FOCoS. FO-EB. S-Connect.

I count more than twenty five acronyms in regular circulation, most of which sound like the others, several of which are the same thing under different marketing names, and at least two of which are routinely confused with each other by people who write about this for a living.

And here is what I noticed when I started asking around. Nobody understands it. Genuinely nobody. Not retail investors, obviously. But also not most professional analysts, who nod along in earnings calls and then write “advanced packaging remains constrained” as if that sentence contains information.

I watched a well followed finance account confidently explain that CoPoS is the successor to CoWoS. It is not. I watched another confuse glass core substrates with glass interposers, which are two different products several years apart in maturity. I read a broker note that treated EMIB and CoWoS as competing on performance. They are not competing on performance at all.

So the situation, as of this month, is this. The single most important physical constraint on the entire AI buildout is buried under a mountain of jargon that almost nobody has bothered to decode, while the biggest companies in the world quietly wire billions of dollars in advance to secure access to it.

That is a mispricing engine. That is literally how mispricings are manufactured: make something critical, and make it incomprehensible.

So I decided I had to do something about it.

Nine days, one burned pan of rice

I spent the last nine days on this. I read Yole Group’s July 2026 packaging report. I read TSMC’s North America Technology Symposium roadmap. I read Intel Foundry’s material. I read a Mizuho Securities Asia supply chain note that I originally opened for a completely different reason, and which contains the single detail that started this whole investigation, which I will get to.

I built a spreadsheet with forty tickers and deleted thirty seven of them.

I also, on Sunday evening, burned a pan of rice because I was reading about coefficient of thermal expansion mismatch and forgot I was cooking. My partner was not impressed. Worth it.

Here is the stat that ended the research and started the writing.

CoWoS packaging lead times currently extend 52 to 78 weeks.

Fifty two to seventy eight weeks. One year to a year and a half. To package a chip that has already been manufactured.

Think about what that means. You can have the silicon. You can have the memory, the design, the software stack, the data centre, the power contract, the customers queued around the block. And you still cannot ship, because there is an eighteen month queue for the step that assembles it

That is not a supply chain that is slowing down.

That is a supply chain with a hard physical ceiling.

By the end of this edition, you will understand every one of those acronyms, you will know exactly where that ceiling sits, and you will know the names of three Asian companies that almost nobody covers and that the entire industry quietly depends on.

Let’s go.

What This Edition Covers

• Why Nvidia prepaid $1.5 billion in cash for packaging capacity, and why four other giants did versions of the same thing this year

• Every acronym in this industry, decoded in plain English, so you never have to nod along again

• The $265 billion embarrassment: America made the largest foreign direct investment in its history, and every AI chip made in Arizona still flies to Taiwan to be finished

• The packaging war splitting the industry into two armed camps, and why it is not a fight about performance atall

AND most of all:

• A full demonstration of what the real bottleneck in advanced packaging is

• The six simultaneous locks on packaging capacity and the recursive trap that means money cannot open them

• The three overlooked Japanese companies that own three of those locks, each holding above 90% share or global technology leadership in something nobody has heard of

• The real risks and friction and my honest opinion

1. The Blind Spot

What everybody is watching

Let’s start with the consensus, because the consensus is not stupid. It is just incomplete.

Right now the market watches three things. Nvidia’s revenue. Hyperscaler capex guidance from Microsoft, Google, Amazon and Meta. And TSMC’s leading edge node ramp: 3nm, 2nm, A16, A14.

That is a rational place to look. These are the visible surfaces of the AI buildout. And the underlying mental model is Moore’s Law: smaller transistors, more compute, better AI.

For fifty years that model was correct.

It is now wrong.

The reversal

Here is what actually happened over the last thirty six months, and almost nobody has updated their model for it.

Transistor scaling has slowed to a crawl. TSMC’s A14 node will deliver roughly 20% higher transistor density than N2 in 2028. Its optical shrink successor, A13, will add about 6% a year later.

Six percent. That is a rounding error wearing the costume of a generation.

Meanwhile AI compute demand is not growing at 6% per year. It is growing at a rate that makes 6% look like a typing error.

So where does performance come from now?

It comes from putting more silicon into one package. Not smaller silicon. More of it, stitched together.

This is the part the market has not internalised. The industry stopped scaling down and started scaling out. And when you scale out, the limiting factor is no longer the lithography tool. It is the assembly step: the interposer, the substrate, the bonder, the material underneath.

TSMC said it out loud in its own roadmap material: “AI compute scaling is driven by the combination of advanced logic, SoIC 3D stacking, and CoWoS technologies.”

Read that again. Logic is listed first, but it is one item of three. Two of the three are packaging.

It is not a chip problem anymore. It is an assembly problem.

The bottleneck, in one sentence

Here it is, without naming a single company:

Every frontier AI accelerator on Earth must pass through an advanced packaging line. There are only a handful of such lines in the world. All of them are booked out for more than a year. And all of them depend on a tiny number of machines and one near monopoly material.

That is the whole thesis.

The bottleneck is shifting.

It’s no longer just “can we design faster chips?”

It’s “can we package and ship thm fast enough?”

This is how bottlenecks quietly move through the system.

First design.

Then fabrication.

Now packaging.

Why nobody thinks about it

Five reasons, and they are all structural, which is exactly why the mispricing persists.

One: it is the back end. For forty years, packaging was where chips went after the interesting part was finished. It was called “assembly and test.” It was low margin, outsourced, moved to Malaysia and the Philippines because it was labour work. Careers were not made in packaging. Analysts did not cover packaging. The word itself sounds like cardboard boxes.

Two: it is invisible B2B. You cannot buy an interposer. There is no consumer product. These companies sell to five customers, sign NDAs, and never appear in a keynote.

Three: it is deliberately incomprehensible. Twenty five acronyms, several of them describing the same thing under rival marketing names. Complexity is a moat, and it is also a fog. Value hides in fog.

Four: it is filed under the wrong headings. The companies I will show you are classified as, variously, a textile manufacturer, an industrial machinery maker, and an electronics assembly company. None screens as AI. When a fund manager runs a semiconductor screen, these names do not appear. This is category misfiling at industrial scale.

Five: the numbers look small until they are not. Total back end equipment is a roughly $6.9 billion market. Next to a multi trillion dollar AI narrative, that reads as noise. But a $6.9 billion market that gates a multi hundred billion dollar market is not small.

It is a toll booth.

What happens if this link fails

Let me make this concrete, because abstractions do not build conviction.

If advanced packaging capacity disappeared tomorrow, here is what happens to the AI industry.

Not “it would be delayed.” Not “margins compress.”

It stops.

Not slows.

Stops.

Every Blackwell GPU requires CoWoS-L. Every Rubin GPU requires CoWoS-L plus SoIC. Every Google TPU, every AWS Trainium, every AMD Instinct, every Broadcom custom ASIC requires a 2.5D package. Without the package, a GPU die is a very expensive rectangle of sand that cannot talk to memory. It has no input or output path. It cannot be soldered to anything. It is inert.

You do not get a slow AI industry. You get no AI industry.

Exhibit A: the million units Google deleted

This is the first of the four data points I promised you in the intro, and it is the one that proves the constraint is already binding rather than theoretical.

In late 2025, Google cut its 2026 TPU production target by one million units.

Sit with that number. Not a slipped launch. Not a delayed quarter. A million accelerators, removed from a production plan, at a company that had already paid to design them.

And the reason was not demand. Google’s problem in 2025 was that it could not build TPUs fast enough to satisfy its own internal consumption, let alone external cloud customers. The reason was not the fab either. The wafers were available.

The reason was that TrendForce reported both CoWoS-L and CoWoS-S, TSMC's chip assembly platform, fully booked, and Google could not get an allocation.

Google. One of the five most capitalised companies in human history, with effectively unlimited capital, a decade of custom silicon experience and one of the deepest engineering benches on Earth.

It could not get a slot.

That is not a supply chain constraint. That is a sovereignty constraint on compute itself.

And here is what I want you holding for the next twenty pages.

If a constraint is severe enough to make Google delete a million units of its own flagship product, then whoever sits on top of that constraint is not a supplier. They are a toll collector on the entire AI economy.

There are three of them. They are all listed. Two of them hold above 90% global share of something you have never heard of. All three are classified by the market as something they are not.

I will name them at the end, and I will show you exactly why they belong in a portfolio no matter which packaging technology eventually wins.

Hold that, because it explains almost everything that follows. Every architectural decision made by every hyperscaler since late 2025 has been made by people who watched that happen and decided it would not happen to them.

Exhibit B: the $265 billion embarrassment

If you want the single cleanest illustration of how badly the market has misjudged this, here it is.

TSMC has now committed $265 billion to Arizona: twelve fabs, four packaging facilities, the largest foreign direct investment in American history. Its Q2 2026 results were extraordinary. Revenue NT$1.27 trillion, roughly $40.2 billion, up 36%. Net income NT$706.56 billion, roughly $22 billion, up 77.4%. Gross margin 67.7%. High performance computing was 66% of quarterly revenue. Capex guidance raised to $60 to $64 billion.

And yet: every AI accelerator manufactured at TSMC’s Phoenix fab is still flown to Taiwan to be packaged. All of them. And that stays true for at least two more years.

The United States spent a quarter of a trillion dollars and still cannot finish its own AI chips at home.

Guys, that is kind of insane when you say it out loud. You can build the most advanced silicon on the planet in the Arizona desert, and then you have to put it on a plane to Taiwan so that someone can attach it to its memory.

The wafer is the easy part now. The attaching is the hard part.

And look at what TSMC actually did about it, because this is the detail the coverage skipped. Of the twelve planned facilities, four are packaging plants. C.C. Wei framed that component explicitly as serving multi year customer demand. A third of the largest industrial commitment in American history is being spent on the step everybody calls the back end.

Then, in June 2026, TSMC went further and signed a ten year agreement with Amkor for advanced packaging in Arizona.

Ten years. Not three. The largest and most vertically capable foundry on Earth, a company that has spent forty years insisting on doing things itself, locking a decade of outsourced assembly capacity at a third party.

You do not sign a decade unless you believe the scarcity lasts a decade.

Historically this reminds me of Britain and the Suez Canal. Britain built the world’s largest merchant fleet, controlled the ports, dominated the shipping lanes. And then discovered that a hundred mile ditch in Egypt decided whether any of it mattered. Owning the fleet is not the same as owning the chokepoint.

The market owns the fleet.

I want the ditch.

2. How We Got Here

Twenty years, compressed

Until roughly 2012, chips were monolithic. One die, one package. Packaging meant running a wire from the die to a pin. Moore’s Law did all the work and nobody thought about the back end.

2011 to 2012: the first crack. Xilinx shipped an FPGA that stitched four slices together on a passive silicon interposer. TSMC called the technique CoWoS. A niche solution to a niche problem. Almost nobody cared.

2016 to 2017: two things happened at once. HBM, high bandwidth memory, started shipping in volume, which forced memory to sit physically beside logic on a shared interposer. And Intel introduced EMIB, burying a small silicon bridge inside the package substrate instead of using a full interposer. Two rival philosophies were now on the board.

2017 to 2020: chiplets went mainstream. AMD proved you could beat a monolithic competitor by cutting your processor into pieces and reassembling it. This was an economic argument as much as a technical one, because smaller dies yield better, so a chiplet processor is cheaper to build than one giant one. The industry noticed.

2020 to 2022: transistor scaling visibly decelerated. Full node density gains fell to 15% to 20% every three years. The growth engine started coughing.

Late 2022: ChatGPT.

2023 to 2024: the crunch. AI accelerators outgrew the maximum printable chip size. Every hyperscaler simultaneously decided it needed custom silicon. CoWoS demand went from roughly 370,000 wafers in 2024 to about 670,000 in 2025. TSMC’s monthly capacity at end 2024 was around 35,000 wafers. Do the arithmetic. It did not work.

2025 to 2026: the scramble. TSMC quadruples capacity. Intel resurrects EMIB as a commercial weapon. AMD funds a separate Taiwanese packaging ecosystem with ten billion dollars. Nvidia explores a design that deletes the substrate entirely, then prepays Amkor $1.5 billion for capacity. Every OSAT in Taiwan builds panel lines.

And here we are.

Why now: the four things that changed

One, the size wall became binding. I will explain this properly in the next section, but the short version is that there is a hard physical maximum to how large a single chip can be printed. AI accelerators hit it. Once you hit it, packaging is the only way forward. This is physics, not strategy.

Two, the demand curve went vertical. Total CoWoS demand approaches 1.0 million wafers in 2026, up from about 370,000 in 2024. A tripling in two years. TSMC has been expanding capacity at roughly 80% per year: about 35,000 wafers per month at end 2024, about 75,000 at end 2025, targeting 120,000 to 140,000 by end 2026, with Mizuho now modelling 190,000 to 200,000 by 2027.

Here is the part that should stop you.

The lines are still fully booked.

Capacity quadrupled and the queue did not shorten. When supply quadruples and the waiting list does not move, that is not a cyclical shortage. That is structural, sustained, multi year demand that nobody can serve.

The thing almost nobody says out loud

AI demand is software. Supply is physical.

Demand compounds and deploys over a weekend. A model ships on a Friday and by Monday it is consuming compute in forty countries. Supply arrives in steps, and every step has a construction time you cannot pay to shorten.

These are not two curves running at different speeds. They are two curves of different kinds.

A model ships on a Friday. A cleanroom takes three years. A glass furnace ordered today produces in 2028.

That is why capital does not fix this, and it is worth sitting with, because it is counterintuitive in an industry where capital fixes almost everything. Nvidia can wire $1.5 billion in advance and concrete still cures at the speed of concrete. TSMC can spend $64 billion in a year and the drawing equipment for specialty glass still has a multi year queue.

And it gives us the rule that organises this entire edition:

The more physical the layer, the slower it responds, and the longer the bottleneck sits there.

Hold that rule. It is the reason the constraint travels in the order it does: assembly first, because a line can be built in two to three years. Substrates next, because a substrate fab takes longer and there are fewer of them. Materials last, and longest, because a glass composition and the craft of spinning it cannot be built at all. They have to be learned.

Keep that last sentence in mind, because it is the whole reason this edition ends where it ends. The slowest layer is the most valuable one to own, and almost nobody owns it, because almost nobody has bothered to work out where it is.

Three, concentration became a strategic emergency. Nvidia holds roughly 60% of CoWoS capacity. The top three customers have locked more than 85%. If you are customer number four, and here "customer number four" means a company like Google or Amazon, you are structurally starved. This is what forced the packaging war. It was not a technology decision. It was a procurement decision.

Four, geopolitics arrived. Concentration is not only corporate, it is geographic. Yole Group put it precisely in its July 2026 report: TSMC's CoWoS capacity, Ajinomoto's ABF substrates and one Japanese producer's dominance in specialty glass cloth make Japan and Taiwan the critical chokepoints for AI packaging.

The "why now" in one line

Because the industry's growth mechanism physically relocated, from the front end to the back end, while the market's attention did not move at all.

This is not a story about a shortage. It is a story about a relocation.

The gap between where the value moved and where the attention stayed is the opportunity. And it has a shelf life. The window is narrowing

The size of the prize

Quickly, before we go into the physics, so you know what is being fought over.

Yole Group’s July 2026 assessment puts the advanced packaging market at $55 billion in 2025, exceeding $120 billion by 2031. More telling than the number is the structural claim attached: advanced packaging is overtaking traditional packaging to become the dominant segment, and should be the majority of all packaging revenue by 2031.

The high value core compounds much faster. High end performance packaging, the chiplet integration segment serving AI, reaches $28.5 billion by 2030 at 23% annual growth. Advanced IC substrates add another $31 billion by 2030.

Yole’s Bilal Hachemi put it in a sentence that deserves pinning above every semiconductor analyst’s desk:

“Advanced packaging is no longer a backend afterthought. It has become the physical layer that decides AI-compute availability, memory bandwidth, power delivery, and system cost. That is a structural shift, not just a growth cycle.”

A structural shift. Not a cycle.

And there is a second demand wave that almost nobody has priced. AI server CPUs. Mizuho expects AI application server CPU demand to grow more than 50% year over year in 2027, with ARM based server CPUs more than doubling: Nvidia’s Vera above 7 million units, AMD’s Venice at 5 million, Google above 4 million, AWS above 3 million.

These need advanced packaging too. The market has modelled the GPU wave. It has not modelled the CPU wave stacked on top of it.

3. The Technology, Decoded

3.1 What a package is, and the wall it hit

The baseline

A chip is a rectangle of silicon a few centimetres across. It cannot connect to anything by itself. The package is the structure that carries it. It takes the thousands of microscopic contacts on the underside of the die and fans them out to contacts big enough to solder onto a circuit board.

The standard method is flip chip on organic substrate. The die is flipped upside down and its bumps are soldered onto a multilayer resin board called the substrate. That substrate is built from ABF, meaning Ajinomoto Build up Film.

Yes, that Ajinomoto. The Japanese company that makes MSG seasoning. A by product of their amino acid chemistry turned out to be the best insulating film in the world for chip substrates, and they have dominated it ever since. Modern AI substrates use fifteen or more routing layers of the stuff.

Pause on that for a second, because it sets the tone for everything that follows. The most advanced computers ever built sit on a film invented by a seasoning company. This industry is full of that. Keep it in mind.

Open up the substrate, because it comes back later

Before we move on, cut one of these substrates in half and look at what it is actually made of. This takes ninety seconds and it is the single most useful thing in this section, because in Part 4 every one of these four items turns out to be a global chokepoint.

A substrate is a laminate. Four physical inputs, each doing a different job:

1. Woven glass cloth. The skeleton. Fabric, literally woven on looms, that gives the board its dimensional stability and stops it deforming under heat.

2. Resin and build up film. The insulation between layers. This is where ABF lives.

3. Copper foil. The conductor. Etched into traces that carry signal and power across every layer.

4. Drilled microvias. The vertical connections. Tens of thousands of holes, bored mechanically through the stack to join the layers.

Skeleton, insulation, conductor, hole. That is a substrate.

Now hold two things in your head as you read the rest of Part 3.

First: every packaging architecture I am about to describe still lands on one of these. CoWoS, EMIB, panel packaging, all of it. The interposer, the bridge and the 3D stack are what sit above the substrate. They do not remove it. Chip on wafer on substrate is right there in the name.

Second: everything the roadmap does makes the substrate harder. Bigger packages mean more area to keep flat. More chiplets mean more input and output pins, which means more routing layers and more holes. Faster signalling means the copper has to be smoother. Each step on the roadmap is also a step up in what the four materials underneath must survive.

Remember the four. We come back to them.

And I will be blunt about where this is going, because I would rather you read the technical section knowing what it is for. Three of those four inputs are effectively controlled by single companies. Not oligopolies. Single companies, with shares above 90%, that no AI index contains and no semiconductor screen returns

The wall: what a reticle actually is

Now the single most important number in this entire industry, and I want to explain the concept properly because it gets thrown around constantly without definition.

Chips are not drawn. They are printed, photographically. A machine called a scanner shines light through a patterned mask and projects that pattern onto a silicon wafer coated in light sensitive chemicals. Think of a cinema projector, except the image is a circuit and the screen is silicon.

The reticle is that mask. And like any projector, there is a maximum image size the optics can project in a single shot, cleanly and in focus, everywhere.

That maximum is 26 millimetres by 33 millimetres.

858 square millimetres. Slightly smaller than a credit card.

When you read “one reticle” in this industry, that is what it means: one full exposure, the biggest single continuous piece of circuitry the machine can print in one go. When you read “5.5 reticle,” it means an assembled structure with the area of five and a half of those exposures stitched together.

And this limit is not a cost constraint or an engineering preference you can negotiate around. It is the optical geometry of the lithography tool. It is as fixed as the focal length of a lens.

AI accelerators wanted to be bigger than a credit card. So the industry did the only thing available. It stopped trying to print one big chip and started assembling several smaller ones, called chiplets, into a single package that behaves like one enormous chip.

Which gives us the question that defines the entire sector:

How do you make separate pieces of silicon talk to each other fast enough that they pretend to be one chip?

Answer that and you have advanced packaging.

The analogy

Think of a chip as a city and transistors as buildings.

For fifty years, progress meant making buildings smaller so you could fit more inside the city limits. That worked until the buildings got so small that shrinking them further stopped helping.

So the industry built satellite cities, which are chiplets. And now the entire challenge is the transport network between them. Not the buildings. The roads.

Advanced packaging is the road network. And right now every road building crew on Earth is booked out for eighteen months.

The four axes, and the dimensional vocabulary

Every technology in this sector varies along four independent dimensions. Hold these and nothing that follows will confuse you.

And the dimensions:

Almost everything that follows is 2.5D. The war I am about to describe is a civil war inside 2.5D, two ways of doing the same job.

Three more definitions you need:

RDL means Redistribution Layer. Thin metal wiring layers built directly onto the package, finer than a substrate but coarser than silicon.

TSV means Through Silicon Via. A vertical copper tube drilled straight through a piece of silicon to carry signal or power from top to bottom.

Interposer means a slab of silicon with wiring on it and no transistors. It is a circuit board made of silicon, at lithography pitch instead of PCB pitch.

3.2 The incumbent: CoWoS

CoWoS means Chip on Wafer on Substrate. TSMC’s platform. The de facto standard for essentially every AI and HPC processor in production.

The name is the sequence. Chips (GPU or CPU + HBM) go on a wafer, meaning a carrier that holds the interconnect layer, and that assembled module goes on a substrate. Chip, on wafer, on substrate.

Three variants, and the only difference between them is how much silicon is used to do the connecting.

CoWoS-S, full silicon interposer. A large slab of silicon sits under all the chips, carrying fine pitch wiring plus TSVs to route down to the substrate. Maximum density, maximum cost, because you are burning real wafer area on wiring. And crucially the interposer itself must be printed, so it is capped by the same reticle limit, reaching roughly 3.3 reticles with stitching. This packaged the H100 and H200 generation, and Google’s TPUs.

CoWoS-R, RDL only. No silicon interposer at all. Connection is redistribution layers. Cheapest of the three, lowest density. Good where you need many chips together but not maximum bandwidth between them. Broadcom’s networking and ASIC products lean here.

CoWoS-L, local silicon bridges. The current champion, and the reason this generation exists. Instead of one giant silicon slab, you embed small silicon bridges, called LSI for Local Silicon Interconnect, only where two chips need to exchange enormous bandwidth. Everywhere else you use cheap RDL.

It is the difference between paving an entire county in asphalt and building motorways only where the traffic actually is.

This solves three problems at once. You use far less silicon, so cost falls. You are no longer bounded by the reticle size of a single interposer, so packages get bigger. And you put density exactly where the design needs it.

Blackwell uses CoWoS-L. Rubin uses CoWoS-L. AMD’s Instinct line is moving there. When people say “the CoWoS shortage,” they overwhelmingly mean CoWoS-L.

And note what all three variants share, because it matters later. All of them finish on an organic substrate. The S, R and L refer only to how the chips are wired to each other laterally. Underneath that, in every case, sits the same laminate of glass cloth, resin, copper foil and drilled holes. Every CoWoS wafer TSMC produces creates demand for one of the largest, highest layer count substrates in the industry.

CoWoS capacity going from 35,000 to 200,000 wafers per month is therefore also a substrate demand forecast. And a glass cloth forecast. And a copper foil forecast.

Read TSMC's roadmap that way and it stops being a technology announcement. It becomes an order book for four companies whose names are not in it.

Where it is now, and where it goes

TSMC is in mass production on 5.5 reticle CoWoS with yields above 98%. Five and a half times the maximum printable chip size, at a yield that would have been considered fantasy five years ago.

The published roadmap from the 2026 North America Technology Symposium:

Let me convert that last row into something human, because “14 reticle” means nothing to a normal person.

A 14 reticle interposer measures 12,020 square millimetres. That is roughly the size of a compact disc. Slightly larger, actually. A small dinner plate.

We are going to build a single computer chip the size of a CD, assembled from two dozen separate pieces of silicon, each manufactured to tolerances measured in atoms, all of it bonded flat to within a few microns, which is about one twentieth the width of a human hair, and it has to stay flat while dissipating multiple kilowatts of heat.

TSMC projects that a 2029 package carries 48 times more compute transistors and 34 times more memory bandwidth than a high end 2024 package.

Forty eight times, in five years. Moore’s Law never did that.

But notice where the gain comes from. Only about four times comes from transistor scaling. The overwhelming majority comes from packaging more silicon together.

It is not Moore’s Law anymore. It is Packaging’s Law.

Who actually makes this possible

Here is something you will not find in the TSMC press release, and it is the thread I want you to follow through the rest of this section.

TSMC does not manufacture the tools that place those chiplets. It does not manufacture the glass cloth that reinforces the substrate. It does not manufacture the film that insulates it, or the compound that encapsulates it, or the polishing systems that prepare surfaces for bonding.

Those come from a very short list of suppliers, mostly Japanese, one Singaporean, several of whom have market shares that would trigger antitrust review in any industry the public understood.

Every time you read “TSMC achieved 98% yield,” what actually happened is that a dozen specialised suppliers, most of whom you have never heard of, each solved an extremely narrow physics problem, and TSMC integrated the results.

Hold that thought.

3.3 The challenger: EMIB and EMIB-T

Now the other camp.

The architectural difference

Intel’s EMIB means Embedded Multi die Interconnect Bridge. It solves the identical problem with one structural change.

CoWoS-L puts the silicon bridge above the substrate, inside an RDL layer built at wafer level.

EMIB buries the silicon bridge inside the substrate itself.

Same concept. Different location. And that one difference cascades through the whole manufacturing flow.

Because the bridge sits inside the substrate, EMIB eliminates the wafer level assembly step that CoWoS requires. No interposer to build, no carrier wafer, no chip on wafer stage. You make a substrate with a bridge in it, and you mount chips on it.

Which has a consequence almost nobody draws out, and it will matter a great deal in Part 4. EMIB does not reduce demand on the substrate. It increases it. CoWoS keeps the hard interconnect work in a separate silicon layer above the laminate. EMIB pushes that work down into the laminate, embedding a silicon component inside a structure made of woven cloth and resin, which must then survive thermal cycling without cracking or delaminating around it.

So the two rival architectures are not rival sources of demand for the materials underneath. One needs an excellent substrate. The other needs a more excellent substrate.

Start noticing this pattern, the packaging war has two possible winners at the architecture level and the same handful of guaranteed winners underneath it. You do not have to pick a side. You have to work out who supplies both sides.

It also means the package has no reticle derived size ceiling, because nothing package sized has to be printed by a scanner.

The family, classified by what is inside the bridge

• EMIB, bare bridge, in mass production since 2017

• EMIB-M, adds MIM capacitors inside the bridge, improving power integrity

• EMIB-T, adds TSVs to the bridge

EMIB-T is the one that matters. A plain EMIB bridge only carries signals sideways. It cannot pass power vertically. On a modest package that is fine. On a multi kilowatt AI accelerator drawing enormous current, it is disqualifying, because you cannot get enough power up to the dies.

Adding TSVs turns the bridge into a vertical power conduit as well as a horizontal data road.

There is a nice technical irony here. The strict definition of 2.5D requires through vias in the interconnect layer, which classic EMIB lacks, so some taxonomists file it as “2.3D.” EMIB-T is the version that makes Intel’s approach fully 2.5D, and it becomes commercially viable at exactly the same moment. The technical fix and the commercial unlock are the same event.

Do not settle it on performance

You will read a lot of noise about whether CoWoS or EMIB is “better.” Ignore all of it.

Intel argues EMIB removes wafer level steps, shortens cycle time, cuts cost and has no reticle based size limit. TSMC argues it delivers the largest package in the industry by reticle size.

Both are true. They measure different things.

The war is not being decided on microns. It is being decided on availability.

Exhibit C: the customers voting with their tape-outs

This is the third data point, and it is where the abstract argument becomes a set of dated, named commitments.

Mizuho reports that EMIB-T interconnect yield has passed 95%, with Intel in active discussions with MediaTek, Ampere Computing, AWS and Tesla.

Then it got concrete:

• MediaTek, at Goldman Sachs Taiwan Day, stated its next generation program adopts only EMIB-T, tape out targeted 4Q26, mass production 4Q27. Not “evaluating.” Not “dual sourcing.” Only.

• Google is reported to be using EMIB-T for its next generation TPU, and has reportedly booked Intel to package more than three million TPUs in 2028.

• SK hynix, a memory company rather than a logic company, is testing Intel’s 2.5D EMIB for memory integration.

• Taiwanese suppliers Powerchip and AP Memory have been pulled into the EMIB-T orbit around Google’s TPU program.

• Intel has begun outsourcing EMIB assembly to Amkor in Korea, with further sites planned in Portugal and Arizona.

Intel Foundry generated just $307 million in external revenue not long ago. CFO David Zinsner has called advanced packaging the “brightest spot” for Intel Foundry, with engagements crossing from hundreds of millions into the billions.

So why is this happening? Did Intel suddenly out engineer TSMC?

No.

Look at the second bullet again and connect it to Exhibit A. The company booking Intel for three million units in 2028 is the same company that deleted a million units from its 2026 plan for lack of a CoWoS slot.

That is not a coincidence. That is cause and effect, printed in a supply chain report.

It is happening because Nvidia holds roughly 60% of CoWoS capacity, the top three hold more than 85%, and everyone else got tired of being customer number four.

It is not a technology win. It is a second source decision.

That is the most important sentence in this section. Every hyperscaler learned the same lesson in late 2025: single sourcing your packaging means a competitor can starve you. Google made the lesson expensive and public, and everybody else took notes.

They are not buying EMIB because it is better.

They are buying it because it is not TSMC.

3.4 The second front: SoIC, Foveros, hybrid bonding

First, where we are on the map

Stop for a moment, because we are about to change axis and it is worth being explicit about it. Otherwise the next set of acronyms will feel like more of the same, and they are not.

Go back to the four axes from section 3.1.

Everything in 3.2 and 3.3 lived on axis one, lateral interconnect. CoWoS-S, CoWoS-R, CoWoS-L, EMIB, EMIB-T. Every one of them is an answer to the same question: how do chips sitting side by side talk to each other? They are genuine competitors, they solve the identical problem, and a designer picks one.

We are now moving to axis two, vertical stacking. Different question entirely: how do chips sitting on top of each other talk to each other?

And this is the single most common misunderstanding in the sector, so let me be blunt about it.

SoIC and Foveros are not competitors to CoWoS. They are not alternatives to EMIB. They are a different axis, and they get added on top.

What gets stacked, and what for

Before any of the acronyms, the two questions you should be asking: which chips actually go on top of each other, and why bother?

What gets stacked. Logic on logic. A compute die on another compute die, or a slab of cache memory directly on top of a processor die. AMD’s 3D V-Cache is the consumer example: a layer of cache sitting on the processor rather than beside it. Inside TSMC’s SoIC, it is compute chiplets stacked on compute chiplets.

And here is the part almost everyone gets backwards, so let me kill it immediately:

Vertical stacking is not how the processor talks to its memory. That link is lateral, and it is exactly what CoWoS and EMIB are for. The memory sits beside the compute stack, not under it.

What it is for. Three things, and the third is the one that decides modern designs.

Density. More silicon per square millimetre of package footprint, at a moment when footprint is the binding constraint.

Bandwidth. Two functions that need to exchange enormous amounts of data no longer sit millimetres apart. They sit microns apart. Connection count goes up by orders of magnitude.

Energy. Moving a bit of data across a package costs power in direct proportion to the distance it travels. Shorten the path and the energy per bit falls. On a machine drawing multiple kilowatts, that is not a refinement, it is the difference between a product and a space heater.

Picture a finished AI package as an office block. The vertical stack is floors of the same building, joined by staircases. The memory is the building next door, reached by a walkway. The substrate is the ground both stand on, with the roads leading out to the rest of the city.

3.5D is simply the moment the industry started building upward instead of only spreading outward.

And note what that does to the layer underneath, because it matters later: a taller building on the same footprint needs more power delivered up through the ground it stands on, and more connections down into it. Every floor you add makes the substrate work harder.

Neither camp is selling a 2.5D product anymore. TSMC’s offer is not CoWoS-L, it is CoWoS-L plus SoIC. Intel’s offer is not EMIB-T, it is EMIB-T plus Foveros Direct. Any comparison of the two that stops at the lateral axis is describing a duel while ignoring both combatants’ main weapon.

Hybrid bonding, explained simply

Conventional 3D stacking connects two stacked chips with microbumps, which are tiny solder balls tens of microns apart.

Hybrid bonding removes the solder entirely. You polish both surfaces to atomic flatness, align them, and press them together so the copper pads fuse directly, copper to copper, while the surrounding oxide bonds at the same time.

No bumps. No solder. Direct metal contact.

The gain is not incremental. Connection density rises by orders of magnitude, electrical resistance collapses, and the vertical distance between two chips becomes almost nothing.

The cost is that it demands cleanliness and flatness at a level that is genuinely hard to describe. Surface variation is measured in nanometres. A single particle ruins the bond. This is why the global tool count is so small, and I will come back to that number because it is central to the investment case.

The two camps, again

TSMC’s SoIC means System on Integrated Chips. Two flavours: SoIC-P uses microbumps, SoIC-X is bumpless hybrid bonding. Bond pitch sits at 6 microns today, with a roadmap to 4.5 microns by 2029.

Six microns. A human hair is roughly 70 microns across. So the connections between stacked chips are spaced about twelve times finer than a hair, and the roadmap takes that to sixteen times finer.

TSMC claims 56 times higher interconnect density and five times better energy efficiency versus its 2015 era CoWoS.

Intel’s Foveros covers the same axis. Foveros-S uses a silicon interposer, Foveros-R uses RDL, Foveros-B uses a bridge. Notice they map exactly onto the lateral interconnect axis from our four axis grid, which is a nice confirmation that the framework holds across both ecosystems. Foveros Direct is Intel’s hybrid bonding implementation.

Intel’s stated ambition: Foveros 3D combined with EMIB-T scaling to 12 times reticle size, with sixteen compute dies in a single package.

The number that reveals the real trend

TSMC plans to expand SoIC capacity at Chiayi from roughly 10,000 wafers per month today to 50,000 by 2027.

Five times, in about eighteen months. TSMC guides CoWoS capacity growth at an 80% compound annual rate from 2022 to 2027, and SoIC at 90%.

The vertical axis is growing faster than the horizontal one. Nvidia is expected to absorb most of that expansion.

So when you model this sector, do not model “2.5D packaging.” Model the stack: lateral interconnect plus vertical stacking, as one product.

3.5 The other belligerents: OSATs and hyperscalers

Two groups decide how this war ends, and neither is TSMC or Intel.

The OSATs, arms dealers to both sides

OSAT means Outsourced Semiconductor Assembly and Test, the independent packaging houses: ASE, SPIL, Amkor, Powertech.

For years they were the low margin end of the industry. Not anymore. And the delicious detail is that the same subcontractor now arms both armies:

• TSMC is outsourcing 240,000 to 270,000 CoWoS wafers per year, primarily to Amkor and SPIL, and signed a ten year Arizona agreement with Amkor in June 2026.

• Intel is outsourcing EMIB assembly to Amkor in Korea.

• And on July 23, 2026, Nvidia prepaid Amkor $1.5 billion.

Amkor builds for all of them. When every side of a war buys rifles from the same factory, the factory has a rather good business model. That is why the stock is up 63% year to date and jumped 17% on the Nvidia news.

Mizuho models ASE’s CoWoS capacity at 20,000 wafers per month by 2026 and 40,000 to 45,000 by 2027, with Amkor expanding to 20,000 to 25,000 by end 2027, serving Nvidia’s Vera CPU, GB10, Broadcom’s switch and Microsoft’s CPU via GUC.

The OSATs also have their own bridge architectures, which proves the local bridge concept belongs to nobody:

• FOCoS and FOCoS-Bridge, meaning Fan Out Chip on Substrate, from ASE

• FO-EB, Fan Out Embedded Bridge, from SPIL

• S-Connect and S-SWIFT from Amkor

• EFB, Elevated Fanout Bridge, AMD’s own design, assembled at an OSAT

Exhibit D: the ten billion dollar escape plan

Here is the fourth and final data point, and it is the most extreme of the four.

In May 2026, AMD announced it would invest more than $10 billion in Taiwan’s technology ecosystem, explicitly centred on building out an EFB packaging ecosystem. Elevated Fanout Bridge. AMD’s own bridge architecture, assembled at Taiwanese OSATs.

Strip away the diplomatic language and read what that actually is. A customer is spending ten billion dollars of its own money to construct a supply chain whose entire purpose is to reduce its dependence on its own primary supplier.

Not to get a better price. Not to get better performance. To get out.

Companies do not do this casually. Ten billion dollars is a nuclear option, and you only reach for it when the alternative is worse. AMD looked at a world in which its main competitor holds roughly 60% of the packaging capacity they both need, did the arithmetic, and concluded that funding an entirely parallel ecosystem was the cheaper risk.

It is not a supply agreement. It is a declaration of independence.

Now line up all four exhibits, because this is the moment the picture resolves.

Google deleted a million units and then booked a rival supplier for three million. TSMC committed a third of the largest foreign investment in American history to packaging plants and signed a decade with an outsourcer. AMD spent ten billion dollars building an escape route. And Nvidia, four days ago, wired one and a half billion dollars in advance.

Four of the most sophisticated buyers on Earth. Four completely different strategies. One identical underlying problem.

None of them can get their chips assembled fast enough.

The hyperscalers, the actual judges

Google, Amazon, Microsoft, Meta. They design the custom silicon, they write the cheques, and they decide which package wins.

Their criterion is not benchmarks. It is allocation certainty.

3.6 Tomorrow’s bets: format and material

Everything so far changes the interconnect. Now we change what sits underneath it.

FOPLP, the format change

FOPLP means Fan Out Panel Level Packaging. The reasoning is beautifully simple.

You are cutting square packages out of a round wafer. On a small package that is fine. But when packages reach 100mm by 100mm, the wasted crescents at the wafer edge become enormous. It is like cutting square biscuits from a circular sheet of dough. The bigger the biscuit, the more dough you throw away.

So: use a rectangle instead.

Panel sizes in production or development span 310 by 310mm at ASE, 515 by 510mm, 600 by 600mm at Nepes, 650 by 650mm at Amkor, and SpaceX targeting 700 by 700mm for its own line.

Yole estimates 20% to 30% cost savings versus wafer level fan out at high throughput.

And there is a precise threshold that tells you when this switches on. Below about 3.5 reticles, wafer and panel utilisation are similar. Above 3.5 reticles, panel utilisation improves significantly, and interposer quality on a 300mm panel becomes better than on a 300mm wafer.

That threshold matters because production is already at 5.5 reticles and heading to 14. We are past the crossover. The economics have flipped.

CoPoS, TSMC’s entry

CoPoS means Chip on Panel on Substrate. TSMC’s panel version.

Say this clearly, because nearly every article gets it wrong: CoPoS is not the successor to CoWoS. It is CoWoS moved onto a different carrier. The interconnect architecture, meaning silicon bridges and RDL, is unchanged. Only the format changes.

The target format is 515 by 510mm, offering roughly three times the usable area of a 300mm wafer.

Note what a panel is, physically. It is a very large rectangular sheet that has to stay flat through the entire process. Which means the format transition is, among other things, an enormous escalation in demand for low expansion reinforcement, because holding a 515 by 510 millimetre sheet flat is a materially harder problem than holding a 100 millimetre square one.

Official timeline: an R&D line at TSMC subsidiary VisEra established in 2025, materials and equipment qualification targeted around June 2026, pilot production mid 2027, with Nvidia’s Feynman platform as expected first customer.

But the sources genuinely disagree. An April 2026 report states CoPoS mass production has been pushed to the fourth quarter of 2030, roughly two years later than expected, due to technical bottlenecks in uniformity and warpage. Other sources maintain 2028 to 2029.

I am not going to pretend to resolve that. What I will tell you is what the disagreement means: if CoPoS slips, CoWoS’s lifecycle extends, and every supplier feeding the existing CoWoS ecosystem gets more years of revenue than the market currently models.

The delayed future is a gift to the present.

And note the reason for the delay. Uniformity and warpage. Remember that word.

There is also a status asymmetry worth knowing. On panel format, the OSATs are ahead of the foundries. ASE already runs a 300 by 300mm panel line in mass production at Kaohsiung. Powertech has produced panel level fan out in volume since 2019 under the name PiFO. TSMC is not entering virgin territory, it is entering a format others already industrialised on easier products. The gap between “easy panel” and “hard panel” is precisely uniformity and warpage.

TSMC itself has pushed back on the hype, stating publicly that panel packaging will not replace CoWoS anytime soon for the largest future AI processors, noting wafer level technology can scale to 58 large dies in a single package.

SoW, the whole wafer

SoW means System on Wafer, taking format logic to its endpoint: do not cut the wafer at all.

SoW-P, for logic only, entered production in 2024. SoW-X is targeted for 2029 at a 40 reticle format, integrating up to sixteen compute chips.

Forty reticles. That is not a chip. That is a silicon tabletop.

Wafer scale is not theoretical, by the way. Cerebras has shipped wafer scale processors commercially for years. SoW is the industrialisation of a proven idea, not an invention.

As Dr. Moh Kolbehdari of Socionext put it in EDN, wafer scale integration does not remove complexity, it relocates it: wafer scale expands silicon until the system must adapt around it.

Glass, the material change

Two completely different products get called “glass substrates,” and conflating them is the single most common error in the press:

1. Glass core substrate, replacing the organic core of the package substrate. Nearer term.

2. Glass interposer, replacing the silicon interposer. Samsung targets around 2028.

Why glass? Because of warpage. Again.

AI packages now exceed 100mm by 100mm and organic substrates cannot hold flatness at that size. Glass can be matched in thermal expansion to silicon, has an order of magnitude lower dielectric loss, and processes in large panels. On paper it is the correct material.

Status in 2026: this is the first year glass crosses from R&D into pilot and qualification, with volume ramp expected 2027 to 2030. Intel showed the first sample combining EMIB with a glass core substrate at NEPCON Japan in January 2026, with no micro cracking. SK Absolics has a Georgia facility targeting production. Samsung Electro-Mechanics targets glass core commercialisation 2026 to 2027.

Obstacles are real: a two to three times cost premium, yields around 75% to 85%, and brittleness. A sober forecast puts commercial penetration above 20% at 2028 at the earliest.

And an important caveat from the EDN analysis: glass changes the package problem, it does not eliminate it. In most glass core designs the glass is only the core, the build up layers remain, and the hardest high speed routing challenges stay concentrated in the top build up structure.

Translate that into materials. A glass core substrate still needs build up film, still needs copper foil for the high speed layers, and still needs to be drilled. It replaces the middle of the sandwich, not the sandwich.

Also worth noting who makes this glass. Not Intel. Not TSMC. It comes from AGC, Nippon Electric Glass, Corning and SK Absolics. Once again the enabling layer sits with a handful of specialist materials companies, and once again most of them are Asian.

CoWoP, deleting the substrate

The most radical bet, and it is Nvidia’s.

CoWoP means Chip on Wafer on PCB, sometimes Chip on Wafer on Platform. Eliminate the ABF substrate entirely and mount the interposer module directly onto a high precision PCB, typically an SLP, meaning Substrate Like PCB, built with mSAP, meaning modified semi additive process.

Claimed prizes: shorter signal paths, better thermals through direct heat spreader contact, and 40% to 50% packaging cost reduction from removing ABF and BT substrates.

Why does Nvidia care so much? Strategy, not physics. ABF is a known bottleneck with no domestic US source. Escaping ABF is a supply chain and geopolitical move as much as a technical one. It is the same logic that produced the $1.5 billion Amkor prepayment: reduce dependency, at almost any cost.

Obstacles are severe. The PCB must take over high density routing at 15 to 20 micron line and space or finer while holding strict flatness.

And here is the irony that should stop anyone treating CoWoP as a threat to the materials layer. Deleting the substrate does not delete the materials. It moves them one level down and asks for more of them, because a PCB doing substrate grade routing needs finer copper, more layers, more holes and better dimensional control than the substrate it replaced. CoWoP is bearish for substrate manufacturers. It is not bearish for the four things a substrate is made of. Engineering samples are under verification with Zhen Ding, Unimicron, Compeq, WUS and Victory Giant. PCB makers remain openly sceptical.

And the principal identified risk?

Warpage.

3.7 The physics problem that decides who keeps their margin

I have now said “warpage” four times in this section without properly explaining it. Let me fix that, because this is the single most important concept in the entire article, and it is what leads directly to the companies in Part 4.

What warpage actually is

Different materials expand at different rates when heated. This is measured by the coefficient of thermal expansion, abbreviated CTE.

Silicon has one CTE. Organic substrate has a much higher one. Copper has a third. Glass cloth has a fourth.

Now bond them together. Heat the assembly to bonding temperature, which is a few hundred degrees. Cool it down. The layers shrink by different amounts and fight each other.

The whole thing bends.

That is warpage. Take a piece of paper, glue it to a piece of cling film, and put it in the oven. That is your AI package.

Why it decides what is buildable

On a small package, warpage is trivial. On a package the size of a dinner plate, with tens of thousands of solder connections that each need to land within microns, it is the difference between a working product and expensive scrap.

The literature is blunt about the mechanics. Standard flip chip bonding cannot be used below about 100 micron connection pitch, mainly because the large CTE difference between silicon and organic substrates produces large stresses and warpage after the mass reflow process, and these problems get worse with thin dies and die stacks. Measured warpage on a free standing organic substrate during chip attach can run 40 to 100 microns. Die pinning during heating can open gaps of 15 microns in the bonding plane and produce 10 micron misalignment between contacts.

Ten microns of misalignment when your connection pitch is heading toward six microns means the connection simply does not happen.

Now recall the roadmap. Package area goes from 858 square millimetres to over 12,000 square millimetres by 2029. Warpage scales brutally with area. Every step on that roadmap makes this problem harder, not easier.

Note carefully what that does and does not mean. It does not mean packages cannot be built today. Clearly they can, at above 98% yield. It means the cost of keeping them buildable rises at every step, and that cost is paid to a very small number of suppliers.

The evidence that it is already expensive

Look at what warpage has already done:

• It cost Blackwell yield in early production, through CTE mismatch causing warping at temperature.

• It is one of the two named reasons for the CoPoS delay, alongside uniformity.

• It is the principal identified risk for CoWoP.

• CTE matching to silicon is the central argument for glass substrates.

• It is described by TrendForce as the defining challenge as panel level packaging scales toward advanced AI chip packaging.

One physical problem explains a past failure, a present delay, a future bet and an entire materials transition.

This is why I keep insisting that advanced packaging is not an engineering discipline that gets optimised away. It is a materials physics problem. You do not solve materials physics with capital expenditure. You solve it with decades of accumulated process knowledge, and with a very small number of specialised materials and machines.

The four ways the industry is trying to beat it

And here, finally, is the part that matters for your portfolio. There are exactly four approaches to solving warpage, and each one maps onto a specific supplier layer.

Approach one: fix it at the source, with materials. Change the skeleton so it stops fighting the silicon. This means low CTE reinforcement in the substrate, specifically specialty glass cloth engineered to expand at nearly the same rate as silicon. It also means CTE tuned molding compounds and underfills, and eventually glass cores. This is the cleanest fix because it removes the cause rather than managing the symptom.

Approach two: fix it during assembly, with the bonding process. Replace mass reflow, where you heat the whole assembly in an oven and hope, with thermal compression bonding, abbreviated TCB, where a machine holds the die, applies controlled force, and heats only locally. The literature states it directly: thermocompression bonding resolves these issues by minimising the temperature the organic substrate is exposed to and much more closely controlling the bond line. Related variants include reverse laser assisted bonding and reverse thermocompression bonding, plus flat reflow systems that clamp the substrate physically flat through the thermal cycle.

Approach three: eliminate the thermal event entirely, with hybrid bonding. No solder means no reflow, and no reflow means the biggest single warpage inducing thermal excursion disappears. This is the endgame fix, and it is why hybrid bonding matters far beyond its density benefits.

Approach four: compensate with process tricks. Temporary carriers, balance films applied to counteract known warpage, low temperature photosensitive polyimide, chip last process flows using glass carriers. Clever, effective, and a growing niche in its own right.

Why this is an Asian story

Now look at who actually supplies those four approaches.

The specialty low CTE glass cloth: a Japanese company holding over 90% global share. The molding compounds and underfills: Japanese. The build up film: Japanese. The glass for glass cores: Japanese and Korean. The thermal compression bonders: Japanese and Singaporean. The hybrid bonders: European and Japanese. The flat reflow systems, the carriers, the balance films: overwhelmingly Japanese, Korean and Taiwanese.

Not one of them is American. Very few of them are covered by more than a handful of analysts. Several of them are classified in indices as industrial or materials companies with no AI exposure whatsoever.

The physics problem that sets the ceiling on how large a package can be built is being solved, right now, almost entirely by Asian suppliers that the market has filed under the wrong headings.

Keep that list in mind. Section 4 is going to explain why it matters far more than it looks.

4. The real bottleneck: the full demonstration

We now have every piece needed to answer the question this edition exists for, so let me build the argument properly, one step at a time.

Warpage is not the bottleneck, and I need to say so plainly

Now I have to deal with an objection, because if you have been reading carefully you should already have raised it, and if I dodge it the rest of this article is worth nothing.

Everything I showed you in Parts 1 and 2 describes a quantity problem. Fifty two to seventy eight week lead times. Nvidia holding 60% of capacity. Google unable to get a slot. A supply demand gap of 20%. None of that is caused by warpage.

And there is a fact that appears to contradict me outright. TSMC reports above 98% yield on 5.5 reticle CoWoS.

Above 98%. If warpage were the binding constraint today, yield would be the problem. It is not. At current package sizes, warpage is a solved problem.

So let me be precise, because getting this wrong is how people build bad theses.

Warpage is not the bottleneck. Capacity is the bottleneck.

And while I am being precise, let me correct something the press gets wrong every single week. There is no packaging shortage.

Supply chain reporting this year is blunt about it: wafer bumping is running at full load, while utilisation on traditional wire bond packaging lines is still gradually recovering. Recovering. Those lines were underused while headlines announced a global packaging crisis. Conventional flip chip has capacity. EMIB has capacity, which is Intel’s entire commercial pitch.

So say it accurately:

There is not a shortage of packaging. There is a shortage of one process, at one supplier, roughly 60% of which is reserved by one customer.

That is a much narrower claim, and it is the true one.

And I am going to resist the temptation to be clever about why capacity is scarce, because the honest answer is boring. Capacity is scarce because cleanrooms take two to three years to build and because the tools that go inside them have long lead times. That is it. Yole’s own data says so: completions across ASE, PTI, Amkor, TSMC, SK hynix, Ibiden and Unimicron cluster in 2027 and 2028, which is simply how long these projects take. I told you in section 4.4 that fewer than a hundred hybrid bonders exist on Earth and that a delivery delay becomes an immediate constraint on global AI output. That was the real answer, and I am not going to walk past it now because a more interesting one is available.

Difficulty plays a secondary role, and I want to size it honestly rather than inflate it. Usable capacity is capacity that yields, and yield on very large packages is bought with years of process learning against dimensional stability under thermal load. Those 98% at 5.5 reticles were not free. Blackwell paid part of the tuition in 2024. At 9.5 reticles, then 14, part of that learning restarts. That is a real effect. It is not the main one.

So why have I spent this entire section on warpage?

Because warpage is not my diagnosis. It is my selection criterion. Those are different jobs, and conflating them is exactly the error I would be making if I told you the shortage is caused by physics.

Here is the bridge, and it is the most important paragraph in this edition.

The capacity shortage triggers an enormous, indiscriminate buying cycle. Everybody who touches this industry gets paid: tool makers, materials suppliers, moulding compound vendors, cleanroom contractors, the people who sell deionised water systems. In the middle of the largest back end capex wave in history, it is genuinely difficult to be a packaging supplier and not grow.

Which means the capacity thesis explains why the sector goes up. It does not tell you which company to own. A story that makes everyone a winner has selected nobody.

So you need a second question, and only one matters:

When the build finishes, who is still hard to replace?

That question is not answered by capacity, which is temporary and escapable. It is answered by the difficulty curve, which keeps rising for as long as the roadmap does. Package area goes from 858 to over 12,000 square millimetres whatever happens to capex. And the difficulty curve, in this industry, is warpage.

That gives us two clocks running at different speeds.

Say it as a single line and keep it for the rest of the article:

Volume makes the revenue. Difficulty protects the margin.

Clock 1 ends. It has to. Capacity gets built, the gap closes, the capex cycle normalises, and every supplier riding pure volume gets de-rated on schedule. That is not a risk I am hedging, it is arithmetic, and Part 6 deals with it directly.

The answer to what survives is: whoever’s product gets harder to replace as packages get bigger. Not whoever shipped the most units during the build.

So the question worth asking is not who benefits from the build. Almost everybody does.

The question is who owns a lock. Let me now show you where the locks are.

The CoWoS shortage will be solved, and that is the point

Now the question that should be bothering you.

If the shortage is narrow, and the escape routes exist, why has it not already been fixed? Customers can migrate to EMIB-T. OSATs can build bridge architectures. TSMC can add lines. Nobody is short of money.

The honest answer is that it is being fixed, and the fix is roughly on schedule. The supply demand gap narrows from around 20% to roughly 10% by the end of 2026. TrendForce expects the severe 2.5D shortage to begin moderating in 2027. I am not going to pretend otherwise to make my thesis look better.

Four frictions set the pace, and none of them is permanent.

Qualification. Requalifying a design onto a different packaging platform takes twelve to eighteen months, and the redesign risk sits with the customer. You cannot re-platform a chip that has already taped out. Blackwell will never become an EMIB product.

Design lock-in. The package is co-designed with the chip, years ahead. Migration happens at the next generation, not the current one. Look at MediaTek’s own timeline: tape out 4Q26, mass production 4Q27. The first real relief from that decision arrives eighteen months from now.

The gap is capability, not just quantity. OSAT bridges are not drop-in equivalents at the very top end. TSMC is running 5.5 reticles at above 98% yield. The escape route works well for a networking ASIC and much less well for a frontier GPU.

Concrete and steel. Cleanrooms take two to three years, which is why Yole shows completions clustering in 2027 and 2028 across ASE, PTI, Amkor, TSMC, SK hynix, Ibiden and Unimicron.

So: two to three years, and then it clears.

And here is what almost nobody is modelling.

Every single one of those escape routes consumes exactly the same four inputs.

An EMIB-T package needs a substrate, and a more demanding one, since the bridge sits inside it. A FOCoS-Bridge line at ASE needs glass cloth and copper foil. A new CoWoS fab at Chiayi needs both. A CoPoS panel needs more of both per unit than the wafer it replaces.

Escaping CoWoS does not reduce material demand. It multiplies it, because you are now building several parallel supply chains where there used to be one.

That is the whole argument in one sentence, and it explains the divergence I will show you at the end of this section: the CoWoS gap closing to 10% while the substrate gap widens to minus 42%.

The market is watching a shortage that is repairing itself.

It is not watching the one the repair creates.

Which brings us to what those four inputs actually are, and who makes them.

The chain, and what it actually requires

Track what has to exist before an AI accelerator can ship.

The die is fabricated. It is bonded onto an interposer. The interposer module is mounted on a substrate. The substrate is what carries power and signal out to the board. Without it, the package is unshippable.

Reminder : the four separate inputs:

1. Glass cloth, the woven skeleton that gives it dimensional stability

2. Resin and build up film, the insulating layers

3. Copper foil, the conductor carrying signal at 112 and 224 gigabits per second

4. Microdrills, which physically bore the tens of thousands of holes connecting the layers

Every single one of those four is currently constrained. Not one of them. All four.

Connecting this to every technology in Part 3

Before the numbers, let me close the loop with everything in this Part, because this is the join that most coverage of the sector simply never makes.

Part 3 was about how chips are wired to each other: interposers, bridges, stacking, formats. Part 4 is about what those structures are physically made of. They are the same story told at two different altitudes, and the roadmap in Part 3 is, read correctly, a materials demand forecast.

That is the point I want to land before the numbers:

Every single architectural path the industry can take from here increases consumption of the same four inputs. The packaging war has two possible winners and four guaranteed ones.

And it explains why the shortage did not arrive gradually. Reticle counts, chiplet counts, layer counts and signalling speeds all stepped up at once, between 2023 and 2026, and each of them independently increases demand on the same four materials. Four multipliers hit four already concentrated supply chains in the same three year window.

The six locks

Here is the full picture, ranked by the size of the measured gap.

Look at the concentration column. Above 90%. Above 95%. Above 90%. Global technology leader. Fewer than a hundred machines. One dominant source.

There is not a single competitive market in that table.

Why six locks are not six times one lock

A single shortage is a nuisance. You wait, you pay more, you qualify a second vendor, you move on.

Six simultaneous shortages are a different animal, and the reason is specific:

Each lock prevents the obvious workaround for the others.

Cannot get T-glass? You cannot substitute standard E-glass, because its thermal expansion is too far from silicon and your package will warp. Cannot get HVLP-4 foil? You cannot fall back to standard foil, because the surface roughness destroys signal integrity at 224 gigabits. Cannot get ABF? There is no alternative build up film qualified for these layer counts. Cannot get coated microdrills? You cannot drill a hundred thousand holes with uncoated ones without destroying the board.

Each escape route is blocked by the physics of the next constraint.

And notice what all four of those blocked escape routes have in common. They are blocked by the same underlying problem: dimensional stability, signal integrity at extreme frequency, and structural integrity on very large packages. The physics I spent Part 3 on is not a separate story from the capacity shortage.

It is the reason the substitutes do not work.

That is the honest, precise link between warpage and capacity, and I want to state it cleanly because I got close to overstating it earlier:

Warpage does not cause the shortage. Warpage is why the shortage cannot be routed around. It restricts the usable material set to a handful of specialty grades, and specialty grades are made by one or two companies each.

How long does this actually last?

Now the question that decides everything, and I am going to answer it against my own interests.

If T-glass is 40% short and prices are up 40% in eight months, why does nobody just build more capacity?

Because expansion is slow, and it is slow for reasons that are real but temporary. The precision drawing equipment needed to expand electronic grade glass capacity is itself on multi year lead times. The threefold Fukushima expansion begins coming online only from late 2026, with full impact in 2028. New entrant Taiwan Glass has hit yield problems that delayed deliveries.

In copper foil, converting an HVLP3 line to HVLP4 or HVLP5 costs 10% to 20% of capacity during changeover, so the industry loses output in the act of modernising.

Definition : HVLP means High Volume Low Profile, and despite the name the parameter being described is surface roughness: lower profile means smoother copper. The higher the number, the smoother the foil. Each step up in interconnect speed forces a step up in foil generation, and you cannot substitute downward at any price.

Capacity scales with the slowest tool in the chain, and the slowest tool is upstream of the upstream.

But I want to be very precise about what that does and does not mean, because this is where a lot of commodity theses go wrong.

The physics protects against substitution. It does not protect against duplication.

Warpage explains why you cannot replace T-glass with ordinary E-glass. It says nothing whatsoever about why a competitor could not eventually build more T-glass capacity. What limits expansion is equipment lead time and process know how, and both of those erode with time and money.

Anyone telling you these are permanent monopolies is selling you something.

The honest counter-case: remember ABF

And there is a precedent that should worry you, because it is almost identical.

In 2020 to 2022, ABF build up film was described in exactly the language people now use for T-glass. Ajinomoto held above 95%. Lead times blew out. Prices rose. Everybody wrote that substrates were the permanent structural bottleneck of the semiconductor industry.

Then it resolved. Substrate makers added capacity, demand softened, and by late 2023 the market was in oversupply.

That pattern repeats with boring regularity in semiconductor materials: two to four years of tightness, then normalisation, often followed by excess. And a 90% share in a tripling market, defended with 40% to 50% price increases inside eight months, is precisely the signal that summons entrants. These companies are funding their own competition right now.

So here is my honest resolution schedule, layer by layer:

Read that honestly. The materials squeeze does not last a decade. It lasts roughly two to three years longer than the assembly squeeze, which is a very different claim and a much easier one to defend.

Two things make this cycle harder than the ABF one, and one thing does not.

It is harder because demand rises in intensity, not just volume. Previous cycles were volume cycles. This one stacks volume growth on top of rising content per unit: area from 858 to over 12,000 square millimetres, more layers, and a forced migration from HVLP-3 to HVLP-4 and then HVLP-5. Adding capacity in tonnes does not help if the grade required keeps moving upward.

It is harder because qualification cycles on AI grades are longer, and Taiwan Glass is demonstrating the barrier in real time by failing at it.

And it is not harder because of the equipment recursion. That is a delay, not a barrier. Delays clear.

The correct claim is not that this shortage is permanent. It is that it lasts materially longer than the market is pricing, and the market is pricing a normal cyclical.

That is a smaller claim. It is also true, and it is enough.

The proof that this is binding, not theoretical

Three pieces of evidence, all from this year.

Allocation has replaced purchasing. CCL suppliers have imposed a rare quota system, requiring substrate and PCB makers to take delivery strictly in line with actual usage. Most of the world’s high end fabric capacity is already reserved by Nvidia and other GPU makers, forcing ASIC developers to queue behind them. When a market moves from price rationing to quota rationing, price has stopped clearing it.

Customers are climbing the chain. Nvidia led customer groups are now bypassing copper clad laminate manufacturers to engage fibreglass cloth and copper foil suppliers directly. Apple has intervened personally to coordinate glass cloth allocation. When the world’s largest buyers go two tiers upstream to negotiate for woven cloth and metal foil, the constraint is no longer at the level everyone is watching.

Pricing power has returned, but only in specific places. Yole’s Yik Yee Tan:

“Pricing power has returned, but not everywhere. The players sitting behind qualification and capacity moats, AI packaging, HBM, high-end substrates, are the ones setting prices.”

Note the mechanism precisely, because it is the whole reason this section matters. Pricing power accrues to whoever sits behind a qualification moat. Not whoever has the best technology. Whoever is hardest to replace. And requalifying a material costs a customer twelve to eighteen months with the redesign risk on their side, so once you are designed in, you are in for the life of the product.

Pricing has gone vertical, and stayed there. The dominant glass cloth supplier raised prices 20% in August 2025 and a further 20% to 30% in April 2026. Ajinomoto raised ABF 30%. The leading copper foil producer raised prices 12%, Mitsubishi Gas Chemical 30% on resin coated foil. Chinese fabric makers pushed through four successive hikes between October 2025 and February 2026, cumulative increases above 50%.

That is not cyclical tightness. That is what a market looks like when demand is inelastic and supply is physically fixed.

The three levels of solution, and why only one of them is real

We have established the disease. Now let me go through the cures, because the industry is genuinely trying all of them and the differences between them decide everything that follows.

There are exactly three levels at which you can attack this problem.

Level 1: reduce demand for the constrained process. Change architecture or format so you need less CoWoS per unit of compute.

Level 2: add supply of the constrained process. Build more assembly capacity, faster, in more places.

Level 3: open the material locks. Make more of the cloth, the film, the foil and the drills.

Take them in order.

Level 1: change the architecture

This is working, and it is working now.

Designs are migrating to EMIB-T, which has passed 95% interconnect yield, with MediaTek adopting it exclusively for its next generation programme and Google reportedly booking Intel for more than three million TPUs in 2028. The OSATs offer their own bridge architectures, FOCoS-Bridge, FO-EB, S-Connect and EFB, and AMD has put more than $10 billion into Taiwan explicitly to build a non CoWoS path. Designers can drop from CoWoS-L to CoWoS-R where bandwidth allows. Stacking vertically with SoIC delivers more compute per unit of lateral area, and TSMC is quintupling SoIC capacity to 50,000 wafers per month by 2027.

Every design that migrates frees a CoWoS slot. This is real relief and it arrives fastest of the three.

Level 2: add assembly capacity

Also working, also real.

TSMC is outsourcing 240,000 to 270,000 wafers a year to Amkor and SPIL. ASE is heading for 40,000 to 45,000 wafers per month by 2027. TSMC has committed $265 billion to Arizona including four packaging plants. Amkor has signed a ten year agreement with TSMC. And Nvidia has invented the most elegant accelerator of all by prepaying $1.5 billion, which converts a balance sheet problem into a pure execution problem.

The panel format sits here too. CoPoS on a 515 by 510 millimetre carrier offers three times the usable area of a 300mm wafer. Although note what is blocking it: mass production reportedly pushed to the fourth quarter of 2030, for reasons of uniformity and warpage.

Level 2 is slower than level 1, because cleanrooms take two to three years, but it is certain. The capacity is being built. The gap narrows from around 20% to roughly 10% by the end of 2026.

And now the problem

Here is the question almost nobody asks, and it is the question this entire edition turns on.

Do levels 1 and 2 do anything at all about the material locks?

Work it through.

You switch from CoWoS-L to EMIB-T. You still need a substrate. In fact you need a better one, because you are now burying a rigid silicon bridge inside a woven laminate that has to survive thermal cycling around it.

You move to a 515 by 510 millimetre panel. You now need to hold three times the area perfectly flat, which is the hardest low expansion reinforcement problem anyone has attempted.

You build four packaging plants in Arizona. They consume exactly the same reels of glass cloth and copper foil as the plants in Taiwan.

You prepay Amkor $1.5 billion. That buys buildings and tools. It does not buy fabric.

Levels 1 and 2 change where you assemble and how you assemble. Neither of them changes what the thing is made of.

And it is worse than neutral. Levels 1 and 2 do not leave the material problem untouched. They amplify it, through two separate mechanisms.

Mechanism one: throughput. Every line built at level 2 consumes materials for its entire operating life. Solving the assembly shortage is, definitionally, multiplying material demand.

Mechanism two: intensity per unit. Every direction level 1 pushes in, larger packages, more chiplets, more layers, faster signalling, increases material content per unit. Area goes from 858 to over 12,000 square millimetres. More pins means more layers and more drilled holes. Faster signalling means smoother copper.

The evidence is already in the numbers, and once you see it you cannot unsee it.

The two curves diverge. The assembly bottleneck closes at precisely the moment the material bottleneck reaches its worst point, and 2028 is exactly the year all that new capacity comes online.

That is not a coincidence. It is a causal relationship.

Solving the capacity problem is the catalyst for the materials problem. The bottleneck does not disappear. It moves one floor down.

Level 3: open the material locks : why it is the only coherent answer

Which leaves the third level, the only one that actually addresses the constraint rather than relocating it.

It is also, by a wide margin, the slowest. The threefold glass cloth expansion in Fukushima reaches full effect only in 2028. Copper foil capacity goes from 718 to 1,140 tonnes per month across 2026 to 2028, roughly 35% a year, against an effective shortfall of 28% to 39%. Ibiden’s ¥500 billion buys 2.5 times substrate capacity by 2028. Second sources are trying, and Taiwan Glass is currently demonstrating how hard it is by failing on yield.

And remember why it is slow: the expansion equipment for these materials is itself on multi year lead times. Level 3 cannot be accelerated with money, which is precisely what makes it the durable constraint.

So the three levels resolve on completely different clocks:

Two fast solutions that make the third problem worse, and one slow solution that is the only real fix.

And then the second engine starts

Which raises the obvious objection, and it is the one you should be holding by now. If capacity normalises around 2028 and the material squeeze clears by 2030, is this not simply a three year trade dressed up as a structural thesis?

It would be, except for one thing. Look at what the industry does the moment the capacity panic ends.

Nobody redesigns their manufacturing platform while sprinting to fill orders. Format and material transitions happen after the shortage, not during it. And the roadmap says exactly when.

Every one of those lands in the window where the capacity shortage resolves. That is not a coincidence. It is a sequence.

And what gates that second phase? Not capacity. Uniformity and warpage, which are the two reasons publicly given for CoPoS slipping, and the central argument for moving to glass.

So the two engines run back to back rather than in parallel:

Engine one, 2026 to 2028: they get paid by the shortage.

Engine two, 2028 to 2032: they get paid by the transition, because holding a 515 by 510 millimetre panel flat is a harder version of the exact problem they already solve.

That is the answer to the durability question, and it is why I did not build this basket around companies that help the industry use less packaging per chip. Those firms benefit from phase one and are structurally short phase two.

I want the opposite exposure.

What this means for choosing companies

Now the conclusion, and it falls straight out of the table above.

If you invest in levels 1 and 2, you are buying OSATs, substrate manufacturers and equipment makers. Look honestly at what that means. They are paid once, during construction. They carry the capital expenditure on their own balance sheets. They compete against each other for the same overflow work. And their cycle has a scheduled end date, 2027 to 2028, which everybody can read in the same completion schedules I have been quoting.

If you invest in level 3, you are buying materials. They are paid on every unit shipped, forever. They carry almost no capital risk relative to the cash they generate. Their competitive position is protected by chemistry and qualification rather than by scale. And critically, their demand is accelerated by the success of levels 1 and 2.

The people solving the capacity problem are building the market for the people who own the material locks.

That single sentence is why this edition ends where it does. It is not a preference for materials over equipment as a matter of taste. It is the observation that one group’s success is the other group’s demand curve.

So the filter for Part 4 writes itself. Three conditions, and a company has to clear all three.

One, it must own a named lock from the table in step 4. Not “exposure to advanced packaging.” A specific input, with a measured deficit, where its share is above 90% or it holds acknowledged technology leadership.

Two, the lock must be protected by physics, not by inertia. Thermal expansion, signal integrity, abrasion resistance. Inertia erodes over a qualification cycle. Physics does not erode at all.

Three, it must sell a consumable. A tool is bought once per line, so its revenue is the derivative of capacity and rolls over before the build even finishes. A consumable is embedded or destroyed in every unit that line will ever ship. Tool revenue tracks the building of capacity. Consumable revenue tracks the using of it. One of those stops in 2028. The other compounds.

Three conditions. Six locks. And it turns out that only a handful of listed companies clear all three, most of them are Japanese, and every one of them is filed by the market under the wrong heading.

And why nobody has arbitraged this away

One last question before the names, because you should be suspicious of any thesis this tidy. If these companies are so obviously critical, why are they cheap?

Four reasons, and every one of them is structural rather than temporary, which is what makes the mispricing durable.

Category misfiling. They are classified as textiles, mining and metals, precision machinery. They do not appear in semiconductor screens or AI indices. A quant model hunting AI exposure will never surface them.

The misclassification is not “obscure company nobody has found.” It is “critical infrastructure filed under the wrong heading.”

Consolidated figures mask the gem. Each of them runs a fast growing AI critical segment inside a slower legacy group. The consolidated line grows single digits or is even guided down. The segment that matters grows above 30%. The market prices the consolidated line, because that is the line the screen reads.

The boring label. Woven cloth. Metal foil. Drill bits. Nothing about any of those words attracts capital, and the vocabulary problem I complained about in the introduction works in exactly the same direction: what cannot be described does not get valued.

Wrong index, hard access. Tokyo and Taipei listings outside the major global indices, requiring international brokerage access. Passive money does not reach them.

Structural reasons produce structural mispricing. And structural mispricing is the only kind worth building a position around.

Now the names.

5. The Companies

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If you are new here, welcome to Asia Next. We uncover Asia’s most overlooked investment opportunities: hidden world leaders quietly controlling a vital bottleneck of the global tech supply chain, companies whose world-first technologies no competitor can replicate, and strategic players no headline ever mentions. Undervalued today, indispensable tomorrow: that’s where the real upside hides.

Today’s topic : AI optics

How I got here (the boring true story)

Guys, this one started with a bad habit.

I read DigiTimes at breakfast. It is not glamorous. My coffee gets cold. Most mornings I find nothing. Last Wednesday I found one headline: a photonics company I had never heard of was mapping “AI’s optical future” at a conference in Shanghai. I almost scrolled past it. Photonics headlines have been “the next big thing” since roughly 2015, and honestly, I have been burned by that promise before.

But one line stopped me. A technical director at TSMC had listed the three things that block the scaling of a technology called co-packaged optics. Not the chip. Not the software. Three industrial problems: wafer level testing, fiber array unit integration, and high speed optical packaging.

I stared at that for a minute. Because that is not a vision statement. That is a purchase order waiting to happen.

That single sentence became this article.

Today we are talking about optics in AI, here is what we will cover :

• What AI optics really is, the full chain of stages it takes to produce it and where the value hides inside each branch

• The complete economics of the optics market: what it is worth, how fast it compounds, who pays for it, and the three completely different business models hiding inside one sector

• A ranking of which bottlenecks actually matter

• The exact 3 key bottlenecks TSMC named out loud EXPLAINED

• The architecture war splitting AI optics into two blocs

• The one economic law that explains every margin in this industry

AND most of all :

• The overlooked companies that own these critical bottelenecks and the ones positioned to capitalise on all of it

• The asymmetric opportunity hiding at the bottom of the AI stack

• The potential risks and frictions

• My honnest opinion on this opportunity

One promise before we start, because you deserve to know what you are getting.

You will not find AAOI in this article. No Lumentum, no Coherent, no Credo, no Fabrinet in the picks. Those are good companies. They are also the names that every optics thread on X has already discovered, that trade on US exchanges with full analyst coverage, and that have already been re-rated twice. If that is the trade you want, you do not need me for it.

The names at the end of this piece are listed in Tokyo, Taipei, Shenzhen, Shanghai and Hong Kong. Several are followed by fewer than five analysts. One of them has around three hundred employees. One of them is one of only three companies in the world able to mass-produce a component that 1.6-terabit optics cannot exist without. One of them owns the machine that physically limits how fast this entire industry can ramp. Most of them do not appear in a single Western AI screen, because they are not filed as AI companies at all.

That is the entire point of this newsletter. I am not here to give you the optics trade. I am here to give you the part of it nobody has found. Section 6 is where the names are. Everything before it exists to make you understand why those names matter.

The consensus everyone is comfortable with

Here is what the market watches every single day.

It watches GPU shipments. It watches Nvidia’s revenue. It watches how many billions Microsoft, Meta, Amazon and Google will spend next quarter. It watches memory prices, because HBM is scarce. Those are all real. I am not here to tell you the AI trade is fake.

But this consensus has a hole in it. And the hole is physical.

The thing nobody counts

An AI model is not trained on a chip. It is trained on thousands of chips that must behave as one single brain.

So the real product of an AI data center is not compute. It is connected compute.

And here is the number that should bother you: in large training clusters, a very large share of total time can be lost to communication instead of calculation. A GPU that waits for data is a GPU doing nothing. You paid 40,000 dollars for that silence.

Now the physics. All that data currently moves through copper. Copper has three diseases at high speed, and all three are terminal.

Signal decay. The faster the electrical signal, the faster it dies. At today’s speeds, a copper trace survives a few tens of centimeters. After that you need repeaters. Repeaters cost money, add heat, and add delay.

Power. Pushing bits through copper at these rates burns a lot of energy. Networking can eat around a tenth of a modern AI data center’s total power. Every watt used to move a bit is a watt you did not use to compute.

Density. A modern accelerator must move tens of terabits per second in and out. You physically cannot solder enough copper pins on the edge of a chip to do it. Engineers call this the “beachfront problem”. The shore is too short for the traffic.

Jensen Huang, Nvidia CEO even said it himself

« We should use copper as much as we can, for as long as we can, but copper has its limits," "The right strategy is to scale up with copper as long as you can — after that you scale up further with optics, you scale out with optics and you scale across with optics. So you use optics wherever you must, you use copper wherever you can »

The entire AI industry must now move the point where electricity becomes light closer and closer to the chip, and almost nobody on Earth can build the parts that make that possible.

Hold on to that phrase “almost nobody on Earth”. I am going to repeat it, because by section 6 I am going to hand you the names of the specific companies it refers to, and I want you to feel the weight of it before you see them.

Why this is bigger than it sounds

If this link fails, everything above it stops. Not slows. Stops.

You can have all the GPUs on Earth. You can have all the HBM stacks. You can have a gigawatt of power. If the light cannot get into the chip, the cluster is a very expensive room heater.

And the reason nobody talks about it is almost funny.

The components involved are boring, tiny, and invisible. They are pieces of glass, ferrules, lenses, alignment machines and test benches. They have no brand. They appear in no keynote. There is no ticker called “the light gets in”.

I keep coming back to one thought from that weekend. The market spent 2024 and 2025 learning the word “HBM”. It will spend 2027 learning a three letter acronym it has never heard.

From Telegraph Wire to Photon: How an Old Idea Became the Constraint of the AI Era

The slow part of the story

Optical communication is not new. That is exactly why the market ignores it.

Fiber optics replaced copper in long distance telecom in the 1980s. Corning made the low loss glass. Telephone companies laid it under oceans. For thirty years, “optics” meant “the boring pipes of the internet”. It was a cyclical, low margin business tied to telecom capital spending. Investors got hurt in 2001 and remembered.

Then the data center happened, and light started walking indoors.

• 2010 to 2016. Data centers grow. Optical modules move from telecom to hyperscale. Speeds climb from 10G to 40G to 100G. The business is still mostly a commodity. Chinese manufacturers enter and drive prices down, exactly as they did in solar and LED.

• 2017 to 2021. 400G arrives. Silicon photonics becomes industrially real: engineers learn to carve light guides into ordinary silicon using ordinary chip factories. This matters more than it sounds. It means optics can finally ride the semiconductor cost curve instead of being handmade.

• 2022 to 2024. The AI boom starts. Suddenly the network inside the building matters more than the network between buildings. 800G modules ramp hard. One Chinese supplier becomes the world leader by volume. Silicon photonics goes from a niche to roughly half of the high speed market.

• 2025. The wall becomes visible. Copper stops being “expensive” and starts being “impossible” for the next generation. Nvidia announces switches where the optics sit inside the package. TSMC announces an industrial platform to build them. The industry finally says the quiet part out loud: the interconnect is now the limiting factor.

• 2026 (this year). Everything accelerates at once. Volume production of co-packaged optical switches begins in the second half. A Chinese hyperscaler commits to deploying near-packaged optical super nodes in the fourth quarter. At the Shanghai AI conference in July, for the first time ever, there is a dedicated exhibition zone for the whole optical computing supply chain. Chinese accelerator makers show optical super nodes with over a thousand chips. Marvell pays 3.25 billion dollars for an optical interconnect startup. And in April, the world's first listed AI photonic computing company IPOs in Hong Kong and closes its first day up 384%.

The “why now” in one paragraph

Here is the inflection, compressed :

The Bottleneck, Technically: A Complete Walk Through the Light Supply Chain

OK. Deep breath. This section is the heart of the article, and it is long on purpose. I am going to walk you through the entire chain, in the order the light travels it.

I will use one analogy the whole way through, so keep it in mind.

Think of a car. The GPU is the engine. Everyone talks about horsepower. But an engine with a bicycle chain for a transmission delivers zero power to the road. The interconnect is the transmission. And right now the industry is trying to bolt a Formula 1 engine onto a drivetrain designed for a family sedan.

The mental model, before we start. To send one bit of data as light, you need five things: something to make the light (a laser), something to write data onto it (a modulator), something to catch it at the far end (a photodiode), electronics to clean the signal (a DSP), and, critically, a way to get the light into and out of the chip (the coupling). Hold those five ideas. Everything below is either one of them, or the industry that makes one of them possible.

My criticality scale, so it means something:

• 5/5 = if this stops, the industry stops. Replacement takes 3 to 5 years, or is impossible.

• 4/5 = severe disruption. Replacement takes 1 to 3 years and hurts.

• 3/5 = painful but survivable. Alternatives exist and are qualified.

• 2/5 = competitive market. Replacement in months.

• 1/5 = commodity.

STAGE 1: THE MATERIALS. Where light is born.

What this stage does, and why it exists at all

Everything in this article eventually comes down to one physical fact, and it is worth stating slowly because almost no investor knows it.

Silicon cannot make light.

So the entire optical AI stack, the whole 39 billion dollar future, starts on materials that are not silicon. Stage 1 is where the industry grows those materials: exotic crystals, atomically thin light emitting layers, and the specialty chemistry that will later hold everything in place.

Think of this stage as the mine and the foundry of a steel industry. Nobody photographs it. Nobody writes about it. And if it stops for six months, every single thing downstream stops with it, because there is no substitute input and no strategic reserve.

The economic character of this stage: very few suppliers, very deep know how, very long qualification, and complete indifference to which architecture wins upstairs. That last point is what makes it interesting for a portfolio.

1a. Compound substrates (indium phosphide, gallium arsenide)

What it is. A disc of a single crystal made of exotic elements, the equivalent of a silicon wafer but for optoelectronics.

The image. Think of it as the canvas. You cannot paint a masterpiece on a bedsheet. Every laser in the world is painted on one of these canvases.

Why it is hard. These crystals are fragile and expensive. They are grown in much smaller diameters than silicon, typically two to four inches against twelve. Yields are mediocre. The growth chemistry is delicate and slow.

1b. Laser epitaxy: growing the active layers

What it is. On that raw canvas, machines deposit dozens of atomically thin layers that will actually emit light: quantum wells, confinement layers, Bragg gratings.

The image. Picture a pastry chef building a mille-feuille where each layer is a few atoms thick, and where a 1% error in thickness changes the colour of the finished cake. Except you cannot see the layers, and you must produce hundreds of thousands of identical cakes per year.

Why it is hard. Layer thickness determines the emitted wavelength directly. Drift by 1% and the laser emits the wrong colour, which makes the component useless downstream. This is recipe knowledge, accumulated over decades of trial and error, held by specific teams in specific buildings. You cannot buy it. You cannot rush it. You can only have started twenty years ago.

Also in this stage, briefly

Thin film lithium niobate. A material that modulates light far more efficiently than silicon, already used in some 1.6 terabit products. A live technology transition rather than a chokepoint today, with very few pure listed plays. Criticality: 3/5, rising.

Optical adhesives and assembly materials. The glue that holds parts aligned within a tenth of a micron, and that must not shrink while it cures. Underrated, qualified into customer processes for years, and held by specialty chemical firms such as Taiwan’s Everlight Chemical and Eternal Materials. Criticality: 4/5.

Synthesis of stage 1

STAGE 2: THE ACTIVE CHIPS. Emit, write, receive.

What this stage does

This is where the industry stops being chemistry and becomes semiconductors. And it splits immediately into two very different worlds that most people confuse.

World one is compound semiconductors. Small wafers, exotic materials, specialised fabs, lasers and detectors. Expensive, low volume, physics driven.

World two is silicon photonics. Ordinary silicon wafers, ordinary chip factories, ordinary lithography, but with light channels etched into them instead of transistors. Cheap per unit at scale, high volume, manufacturing driven.

The entire economics of AI optics depends on pushing as much function as possible from world one into world two, because world two rides the semiconductor cost curve and world one does not. That single sentence explains most of the engineering roadmaps you will read in this sector for the next five years.

What this stage does not do, and this trips people up: it does not connect anything to anything. A photonic chip with no fiber attached is a beautiful, useless object. Which is why stage 3 exists, and why stage 3 is where the money hides.

2a. Laser chips (DFB, EML, VCSEL)

What it is. The component that produces the light. Three families matter. DFB lasers give a very pure single wavelength and are the workhorse continuous light source for co-packaged designs. EML lasers integrate laser and modulator on one chip and dominate high speed long reach links. VCSELs emit from the surface, are cheap, and only work over short distances.

The image. The lightbulb of the system. But a very particular lightbulb: one that must hold exactly the same colour for ten years, inside a hot box, while being switched on and off billions of times per second.

Why it matters more than people think. The laser is the component that ages. Everything else in an optical link is essentially static. The laser degrades over time and with heat. Its reliability defines the reliability of the entire system, which is why laser qualification and burn-in later becomes an industry of its own.

2b. Silicon photonic integrated circuits (PIC)

What it is. A chip where light guides, modulators, multiplexers and couplers are etched into silicon, using the same lithography equipment that prints processors.

The image. Think of the canals of Venice, carved into a chip. The water is light. The bridges and locks are modulators. And the miracle is that you can dig these canals with the same machines that make microprocessors, which means optics finally joins the semiconductor cost curve.

Why this is the enabler of everything. Before silicon photonics, optical components were essentially hand built. That could never scale to AI volumes. Silicon photonics is what makes co-packaged optics economically thinkable at all.

Who does it. Design is often internalised by the large module makers, one of which reports around 95% yield on its own photonic chips with roughly 30% cost reduction. Manufacturing is an oligopoly of three foundries: TSMC, GlobalFoundries and Tower Semiconductor. Yes, the same TSMC that dominates logic. The gate to advanced optics and the gate to advanced compute are the same building.

Also in this stage, briefly

Photodiodes and receivers. The ear at the far end of the line: they convert arriving light back into current. Genuinely difficult, but supplied by several qualified players, usually the same firms that make the lasers. Criticality: 3/5.

DSP, drivers and TIA. The electronics that clean and recover the signal. The DSP is a pair of very sophisticated noise cancelling headphones: it lets you hear a clean voice in a storm, but it can drain around half the power of the entire module. Which is exactly why one architecture, described below, exists specifically to delete it. A Western duopoly of Marvell and Broadcom, with Maxlinear and Semtech chasing. Criticality: 4/5 today, declining by design.

Synthesis of stage 2

STAGE 3: THE PRECISION PASSIVES. Guide the light, and let it in.

What this stage does, and why it is the centre of gravity of this entire article

Nothing in stage 3 is “active”. No transistors, no gain, no electricity. These are pieces of glass, blocks of ceramic, lenses, plugs and fibers. That is exactly why the market ignores them.

And here is the counterintuitive part. In most technology chains, value concentrates in the active, programmable, clever parts. In optics it does the opposite, because the hard problem is not intelligence. It is geometry at a scale that human hands and ordinary machines cannot reach.

But to understand why this stage matters more than any other, you first need to know how the industry arranges all these components. Because that arrangement is the entire investment question, and it comes down to one thing: how far from the chip do you convert electricity into light?

Pluggable optics is where we are today, and it is essentially the whole market. The optical engine sits in a removable box on the front panel of the switch, and the electrical signal travels 20 to 30 centimeters of circuit board to reach it. You can swap it in 30 seconds when it dies. It is multi vendor, mature and repairable. The problem is brutal though: at 1.6 terabits, those 20 centimeters of copper cost a fortune in power and in correction chips.

LPO, or linear pluggable optics, is the clever side branch. Same physical box, but you delete the DSP and drive the optics linearly. Power drops by around half, cost drops with it, but reach shortens and integration gets harder. It squeezes one more generation out of the current architecture. Eoptolink, the world number three in modules, reportedly runs around 45% gross margin on these.

NPO, or near packaged optics, is the bridge, and it arrives now. The optical engine leaves the front panel and sits on the board, 2 to 5 centimeters from the chip, arranged around its socket. Copper distance drops by roughly 90%. Power drops by an estimated 30 to 40%. And the key property: the optical engine stays a separate component, built, tested and replaced independently. If it dies, you do not throw away the switch. Roughly 80% of the benefit of the next step, with 20% of the risk. That is why Tencent is deploying near-packaged super nodes in the fourth quarter of this year instead of waiting for perfection.

CPO, or co-packaged optics, is the rupture. The optical engine moves inside the chip package, millimeters from the silicon, on the same substrate. TSMC industrialises this under the name COUPE, a platform that stacks the photonic chip and the electronic chip using its SoIC 3D bonding, with mass production scheduled for 2026 and photonic capacity planned to grow more than thirtyfold in three years. Nvidia has publicly claimed roughly 3.5 times better network power efficiency for its co-packaged Quantum-X and Spectrum-X switches, plus a density that copper simply cannot reach. The price you pay: wafer level optical testing becomes mandatory, assembly must happen at the micron, and repairability is gone.

Now the consequence that almost nobody is pricing, and I have not seen it written anywhere.

CPO is gated by advanced packaging, which is gated by TSMC. China cannot access it. NPO is not gated at all. It uses conventional packaging and is buildable with domestic Chinese capability, today.

So look at what is actually happening on the ground.

Western architectures march toward co-packaging. Chinese platforms industrialise near-packaging and treat it as a destination, not a waiting room. Tencent deploys near-packaged super nodes this quarter. Biren showed a 1,024 GPU optical super node at the Shanghai AI conference, and Enflame displayed China’s first glass substrate optical chip sample there. And Huawei builds the Atlas 950, an 8,192 chip system running on its own UnifiedBus interconnect, with zero American components inside.

Two architectures. Two blocs. One conclusion, and this is why stage 3 is the centre of gravity of the whole article:

The components in this stage are required in both. Near-packaged needs them. Co-packaged needs them. Chinese systems need them. American systems need them. Whoever wins the war upstairs, the fiber still has to meet the chip, and only a handful of companies on Earth can make that happen.

I keep thinking about the arms merchants of the Italian city states. The condottieri fought each other constantly, season after season. The armorers of Milan got rich either way. That is exactly the position I want to own.

3a. Fiber Array Units (FAU) : the doorway, and the tightest point in the chain

What it is. The precision block that holds a comb of optical fibers perfectly aligned in front of the waveguides etched into a photonic chip. It is the physical interface between the world of glass fiber and the world of silicon.

Now the numbers, because they are the whole story. The core of a single mode fiber is about 9 microns across. The light guide etched into the chip is a few hundred nanometers. You must align them within roughly a tenth of a micron, glue them permanently, and the joint must survive years of heating and cooling cycles.

A human hair is about 70 microns thick. So this alignment is roughly seven hundred times finer than the thickness of a hair.

The image. Imagine threading twenty needles at once. Now imagine the needles are seven hundred times finer than a hair. Now imagine you must glue the thread in place permanently, and it must not move by more than a fraction of a hair’s width for ten years, through daily thermal cycles. That is a Fiber Array Unit.

And now the scale.

In Nvidia’s publicly described Quantum-X800 co-packaged switch, there are four switch chips, each made of six chiplets, each chiplet carrying three optical engines. That is 72 optical engines in a single box. Each fiber array holds around 20 fibers. So over a thousand fibers, every one of them aligned at the sub micron level, dancing inside one machine.

Every single one is a potential point of failure. Hold that thought, because in a few pages I will show you the economic law that turns this fact into pricing power.

Why it cannot be replicated quickly. Four competing physical approaches currently exist for getting light from a fiber into a chip: direct V groove coupling, beam expanding mirrors, metalenses, and glass waveguides. Each one trades alignment tolerance against optical loss against cost. The fact that four approaches coexist tells you the physics is not settled, which is simultaneously the opportunity and the risk. And once a supplier is designed into an architecture, requalification takes quarters to years.

The customer’s own testimony.

Hou Shangyu, who runs advanced packaging integration at TSMC, publicly named fiber array integration as one of the three bottlenecks blocking the scaling of co-packaged optics, alongside wafer level testing and high speed optical assembly. That is not analyst speculation. That is TSMC telling you where its pain is.

3b. Ferrules, connectors and shuffle boxes

What it is. The plugs of the optical world. A ferrule is a precision block drilled with holes where fibers sit. A connector groups 12, 16 or 24 fibers into a single plug. A shuffle box redistributes the hundreds of fibers inside a switch to the correct ports.

The image. Think of drilling holes in a coin, where each hole must be positioned to a fraction of a micron, and you must drill millions of coins a year, identically. That is ferrule manufacturing. It looks like a nothing part. It is thirty years of tooling knowledge.

Why it is getting more important, not less. The industry is moving toward detachable optical connections, because nobody wants to scrap an entire package when one fiber fails. Every step toward detachability multiplies the number of connectors and raises their precision requirement.

Also in this stage, briefly

Integrated passives. Splitters, multiplexers, isolators and microlenses: the roundabouts, traffic lights and one way signs of the optical road network. Individually unglamorous, collectively necessary, and supplied by multiple qualified players across China, Taiwan and Japan. Criticality: 3/5.

Specialty optical fiber. Low loss, small diameter and bend insensitive fiber for dense routing inside servers. The road itself: boring until it is missing. Concentrated among Corning, China’s YOFC, and Japan’s Fujikura and Furukawa, but not the binding constraint today. Criticality: 3/5.

Synthesis of stage 3

STAGE 4: THE ASSEMBLY. Turning components into products.

What this stage does

This is the loudest, biggest, most visible stage of the chain. It is where the revenue is. It is where the famous names are. And it is, paradoxically, the stage with the weakest structural position, for a reason worth understanding.

Assembly is integration.

Integration is a demanding skill: yield management, qualification, supply chain, scale. But integration is also the thing customers most want to commoditise, because they can qualify a second source, split volumes and negotiate. And in this specific industry, integration faces an existential problem: the co-packaged architecture is explicitly designed to make the assembled module disappear as a separate object.

So think of stage 4 as the car assembly plant. Enormous revenue. Real skill. Household names. And permanently squeezed between the component suppliers who hold the scarce parts and the customers who hold the volume.

The interesting sub stage here is not the famous one. It is the category that did not exist three years ago.

4a. Pluggable optical modules

What it is. Integrating laser, modulator, photodiode, DSP and optics into a standardised removable box, qualifying it with each customer, and producing it in millions of units.

The image. The assembled car. It is what the customer sees and buys. It is also where most of today’s optical revenue sits.

The data center optical module market is estimated at roughly 22.8 billion dollars in 2026, with high speed 800G and 1.6T products making up the majority of it.

The uncomfortable truth. Co-packaged optics is designed to eliminate this product as a standalone object. The module makers know it, which is why they are all racing into near-packaged engines, co-packaged components and optical switching. The pluggable business is funding its own succession.

4b. Near-packaged engines and external laser sources: the categories that did not exist

Pay attention to this sub stage. It is three years old.

The near-packaged engine. Because this architecture keeps the engine as a separate component, it creates a brand new product: a compact optical engine designed to sit centimeters from a switch chip and survive that environment. The existing module makers are naturally positioned to build it, and it is their insurance policy against the co-packaged transition.

The External Laser Source, or ELS. Here is the physics that creates it. A laser hates heat: its wavelength and its efficiency drift badly with temperature. And the inside of a GPU package is an oven. So you cannot put the laser in the package. You put it outside, in its own module, and you pipe the light in through a fiber.

The image. It is like moving the fuel tank out of the engine bay because the engine got too hot. A new box, new connectors, new suppliers, new revenue, all created by a single thermal constraint.

4c. Advanced optical packaging

What it is. Physically bonding the photonic chip to the electronic chip, attaching the fibers, and doing all of it with acceptable yield at volume.

Also in this stage, briefly

Contract optical manufacturing. The Foxconn of light: Fabrinet, operating out of Thailand, builds a significant share of the industry’s optical hardware in white label, including for the biggest names in AI. Valuable capacity, but capacity is replicable given time and money. Criticality: 3/5.

Synthesis of stage 4

The economic law that governs this entire industry

Before we walk into the test stage, you need one idea. It is the single most useful concept I know for this sector, and once you have it you will see this industry differently.

The economist Michael Kremer published a paper in 1993 called the “O-ring theory of economic development”. He named it after the Challenger disaster, where one small rubber seal destroyed an entire space shuttle and everyone aboard.

His argument:

Optical packaging is an O-ring industry, and it becomes more so with every step toward integration.

Go back to the thousand fibers in one co-packaged switch. One misaligned fiber does not degrade the package by one thousandth. It can destroy it. And in co-packaged optics, the object being destroyed is not a 1,500 dollar module you swap in 30 seconds. It is a finished package that may sit against a GPU worth tens of thousands of dollars.

Three consequences follow, and they explain almost everything in this article.

First, switching cost stops being about price. No procurement manager saves 4% on a component whose failure scraps a 40,000 dollar assembly. Suppliers who have proven they do not fail get to charge for that, and the customer pays willingly.

Second, testing stops being an overhead and becomes a business. When failure is multiplicative, you must verify every step before the next one begins. That is not a cost centre. That is a mandatory toll booth, and it is the next stage.

Third, the value of reliability rises with the value of the assembly. As GPUs get more expensive, the economic damage of one bad fiber rises with them. Which means the pricing power of the people who prevent that failure rises too, mechanically, generation after generation.

This is why I keep saying the money in this sector is not in the clever parts. It is in the parts that do not fail.

STAGE 5: TEST, INSPECTION AND PRECISION ASSEMBLY. The toll everyone forgets.

What this stage does

If stage 4 builds the product, stage 5 is what makes building it possible at all.

This stage contains two very different things that belong together: the machines that perform the impossible assembly, and the services that verify nothing went wrong. Both exist because of the O-ring problem you just read about.

And here is the fact that should reframe how you look at this whole sector. Remember that the leading foundry publicly named three bottlenecks blocking the scaling of co-packaged optics: wafer level testing, fiber array integration, and high speed optical assembly.

Two of those three live in this stage.

Think of stage 5 as the air traffic control and the maintenance hangar of an airline. Passengers never see it. It generates no glamour. It appears on no marketing slide. And without it, not a single plane leaves the ground.

The economic character of this stage is the best in the entire chain:

Customers pay for it regardless of which architecture wins, regardless of which country builds the system, and regardless of which component supplier gets qualified. It is a toll on the transition itself.

5a. Wafer level optical test

What it is. In ordinary chips, you test by touching metal pads with electrical probes. In photonics you must inject light into, and retrieve light from, waveguides a few hundred nanometers wide, across an entire wafer, at industrial speed.

Why it is mandatory and not optional. This is the “known good die” problem. Because of the O-ring effect, you must be certain a photonic chip is good before you bond it into an expensive assembly. Test too late and you scrap everything. Test well and you protect the yield of the entire industry.

5b. Reliability and failure analysis laboratories

What it is. When a new optical package fails, someone must determine why. Cross sections, electron microscopy, accelerated ageing, thermal cycling, formal qualification reports.

Why this is a real business and not an afterthought. In a young technology going through qualification, failure analysis is consumed massively. Every new material pair, every new bonding recipe, every new thermal profile must be validated, and every failure understood, before volume production is authorised. Demand for this service scales with the newness of the technology and with the value of what gets scrapped.

And here is why it is such a beautiful indicator for an investor: these labs get busy before the industry ships. Their revenue is a leading signal of an industrial ramp, not a lagging one. Most of the market watches shipments. Shipments are the past tense.

5c. Precision assembly equipment: the most underestimated link in the entire chain

What it is. The machines that perform active alignment. I want you to really understand what “active alignment” means, because it is beautiful engineering and almost nobody in the market has thought about it.

The machine turns the laser on during assembly. It measures the light actually coming out the far end, in real time. It then moves the part on six axes, hunting for the position of maximum transmitted light. When it finds that peak, it cures the adhesive while holding the position at nanometer stability.

The image. It is not a robot that places a part. It is a robot surgeon that listens to the patient while it operates, adjusting continuously by feel, then freezing the instant it hears the perfect note.

Why this is the chokepoint of the chokepoint. These machines cost millions of dollars each. Order books stretch across quarters. And here is the consequence almost nobody has internalised: the industry’s entire ramp rate is limited by how many of these machines exist. You can have the demand, the design, the capital and the customer. If the alignment tools are not on the floor, no co-packaged optics gets built. Full stop.

Also in this stage, briefly

Laser test and burn-in. Because the laser is the component that ages, every laser chip runs hours of high temperature burn-in before integration: the equivalent of making every runner complete a full marathon before letting them into the race. Specialised players such as Taiwan’s Winstek and Sigurd Microelectronics, with Korea’s Leeno supplying the test sockets and probe interfaces. Criticality: 4/5.

Synthesis of stage 5

STAGE 6: THE SYSTEMS. Where light becomes a network.

What this stage does

But you must understand stage 6 anyway, for two reasons. First, this is where the architecture is chosen, and therefore where the demand for everything below is created. Second, this stage contains two technologies that could eventually rewrite the stages beneath them.

6a. Switches and network infrastructure

What it is. The boxes that route traffic between thousands of accelerators.

The image. The highway interchange. The GPUs are cities. The switch decides which car goes where, and how fast.

Three circles to distinguish. The American architects define the standards: Nvidia with its Quantum-X InfiniBand and Spectrum-X Ethernet families, Broadcom with the Tomahawk line, plus Arista and Cisco on systems. The Taiwanese white box builders, led by Accton with Quanta and Wistron, physically manufacture most hyperscaler switches, in volume, at thin margins. And the Chinese circle builds the second architecture: Huawei with its CloudEngine systems and UnifiedBus protocol, H3C through Unisplendour, and one listed networking supplier I will come back to in the next section.

6b. Optical circuit switching, and computing with light

Two frontier technologies sit at the top of this chain, and both deserve a place on your watchlist rather than in your portfolio today.

Optical circuit switching replaces electrical routing with microscopic tilting mirrors: between two servers, the signal never becomes electrical again. Imagine a postal system where, instead of opening every envelope at each sorting office, you simply tilt a mirror and the letter flies straight to its destination. Google has built its TPU pods around this approach at scale, with documented cost and energy savings, while Coherent is bringing a product to market and the pioneers Polatis and Calient stayed private or were absorbed. The problem for investors is that there is almost no pure listed play: the specialists are private or acquired, and the largest deployment was designed internally. This is a hole in the market, and the first credible Asian listing in the niche will be an event. Criticality: 3/5 today, potentially 5/5 by 2030.

Photonic computing goes further: using light to perform the calculations themselves, not merely to transport data. Every computer today is an abacus made of electric switches. This proposes an abacus made of light beams passing through one another, where interference does the mathematics by itself, instantly. One pure player is listed in Hong Kong with Baidu, Tencent and China Mobile behind it, America’s Lightmatter remains private, and Celestial AI was acquired by Marvell for 3.25 billion dollars, which is the clearest price signal anyone could ask for that this layer is real. Criticality: 1/5 today, unknowable by 2032. This is not a bottleneck. It is an option on physics.

Synthesis of stage 6

The synthesis: the whole chain ranked by importance

We have now walked all six stages. Let me compress everything into the ranking that is the investment thesis. Same information, sorted by one question only: how hard would it be to replace the incumbent?

TIER 1 — THE ABSOLUTE CHOKEPOINTS

• Fiber array units and optical coupling (3a). The nanometer handshake. Four competing physical approaches, which tells you nobody has settled the physics. Qualification takes quarters to years. Named as a bottleneck by the customer itself. ~39% net margin at the leader.

• Precision assembly equipment (5c). Active alignment machines, millions of dollars each, long lead times, and the physical limiter of the industry’s ramp rate. Sole-source to at least one hyperscale ASIC vendor.

• Wafer level optical test (5a). The known good die problem. Named as bottleneck number one by the foundry. Solved, in part, by a company with 300 employees.

• Laser epitaxy and compound substrates (1a, 1b). The atomic layers that decide the wavelength and the lifetime of every laser. Recipe knowledge accumulated over decades. A ~$200m substrate market gating a ~$90bn one. Completely architecture-agnostic.

• Laser chips (2a). No laser, no light, no link. The laser is also the only component in an optical link that ages, so its reliability sets the reliability of the whole system. Very few firms globally have CW, EML and DFB simultaneously qualified by tier-one customers.

• Silicon photonic foundry capacity (2b). The gate through which every co-packaged design must pass. Three foundries on Earth, one of which is also the gate to advanced compute.

• Switch architects (6a). Critical by any measure, and the only Tier 1 position with no opportunity attached: Nvidia, Broadcom and Huawei define the standards, and they are already owned by everybody at full price. Included for completeness, not as a suggestion.

TIER 2 — CRITICAL BUT CONTESTED (replace in 1–3 years, with pain)

• High-speed optical packaging services (4c). The third named bottleneck, but the work has already moved between vendors, which proves it is winnable.

• Reliability and failure analysis laboratories (5b). Massively consumed during qualification, impossible to displace once embedded in a customer’s procedure, and a leading indicator of the ramp. Already printing record months.

• Ferrules, connectors and shuffle boxes (3b). Sub-micron machining, a thirty-year oligopoly, roughly $130 to $380 of content per GPU, and rising in importance as the industry moves toward detachable connections.

• Near-packaged engines and external laser sources (4b). A product category created three years ago by thermal physics, with no established champion. The most open race in the chain, and now the destination of the largest optical order ever placed.

• Laser burn-in and test (5d). Mandatory because the laser is the part that ages. Every chip runs hours at high temperature before integration. Unglamorous, qualified into customer processes for years, and impossible to skip.

• Optical adhesives and assembly materials (1d). The glue that holds parts aligned within a tenth of a micron and must not shrink while it cures. A small market in absolute terms and effectively un-substitutable once designed in.

• Thin-film lithium niobate (1c). Not yet a chokepoint, but only a handful of firms worldwide can mass-produce 400G and 800G modulators, and the market is forecast to compound at around 41%. Scored 3/5 today and rising faster than anything else on this list.

• DSPs, drivers and TIAs (2d). A Western duopoly with excellent economics, and the only sub-domain in the entire chain that the industry is deliberately trying to make smaller. LPO exists specifically to delete it.

TIER 3 — IMPORTANT BUT COMMODITIZING (replace in months)

• Pluggable optical modules (4a). The revenue king, and the product co-packaging is built to replace.

• Photodiodes and receivers (2c). Hard to make, but several suppliers already qualified.

• Integrated passives (3c). Splitters and multiplexers. Necessary, multi-sourced, thin.

• Standard and specialty fibre (3d). The road itself. Boring until it is missing.

  

⭐ SEPARATE CATEGORY — PROMISING TECHNOLOGIES WITH VERY HIGH POTENTIAL

These do not belong on a criticality scale, because they are not bottlenecks. They are bets on the next architecture. Sized differently, judged differently, and if they work, worth more than everything above them combined.

• Photonic computing (6c). Computing with light rather than merely transporting it. Pre-revenue as an industry. One pure listed player worldwide, valued at ~$10bn on ~$15m of revenue. Binary outcome. The most asymmetric thing in this article.

• Optical circuit switching (6b). Routing photons without electrical conversion. ~$400–780m today, forecast ~$2.5bn by 2029 at ~58% CAGR. Already deployed at scale by at least one hyperscaler. Very few listed ways in — which is precisely why the first credible Asian listing in the niche will be an event.

• Glass substrates for optical packaging. Chinese vendors displayed the first domestic glass-substrate optical chip samples at the Shanghai AI conference this July. Early, but it is the direction of travel for the next packaging generation.

The optics market, whole: what it is worth, how it works, and who pays for it

We have just walked the chain link by link. Now step back and look at the whole thing at once, because the sector-level picture answers questions that no single stage can: how big is this really, how fast does it compound, what kind of business is it, who writes the cheques, and why does the value distribute so strangely?

This is the section I would read first if someone handed me this article cold.

The total market, in nested layers

There is no single “AI optics market” number, because the sector is a set of nested markets that overlap. Here is how I hold it in my head, from the outside in.

Three things jump out of that table, and each one is an investment insight.

First: the growth rate rises as you go down the list. The aggregate optical components market compounds at a respectable but unremarkable ~13%. The specific sub-markets created by the AI transition compound at 25%, 29%, 41%, 58%. If you buy the aggregate, you buy the average. The whole game is buying the sub-market, not the market.

Second: the critical layers are tiny relative to what they gate. A ~$200m substrate market gates a ~$90bn component market. A few-hundred-million-dollar FAU segment gates a $22.8bn module market and, indirectly, the entire AI capex cycle. That asymmetry is not an accident, it is what a bottleneck is. It is also why these companies never show up in a screen: they are too small to be found by anyone looking at the market they control.

Third, and most important: the forecasts do not agree, and the disagreement is enormous. One research house sees the co-packaged and near-packaged market growing from roughly $100m in 2025 to over $39bn by 2030. Another sees co-packaged alone going from $164m in 2026 to $91bn by 2028. A third sees $603m in 2026 to $2.9bn in 2032. Those forecasts are not compatible. They are not even in the same universe.

I am telling you that on purpose, because the gap between them is the information. The industry does not know how to model this yet. That is exactly the condition under which mispricing survives. When everyone agrees on the number, the opportunity is gone. Right now nobody agrees on anything except the direction.

The characteristics of this market, and how it actually works

Six structural features define how optics behaves as an industry. If you understand these, you can price any company in it.

1. It is a design-win market, not a spot market. You do not sell optics on a purchase order. You get qualified into an architecture after a validation cycle that runs from one to two years, and then you ship for the life of that architecture. Revenue is therefore lumpy at the design-win level and then extremely sticky at the shipment level.

2. Architectures turn over every 18 to 24 months. Each turnover is simultaneously a requalification risk for the incumbent and a repricing opportunity. This cadence is the metronome of the whole sector. It is also why “who got qualified on the next generation” is a more valuable data point than any quarterly revenue number.

3. Specifications tighten monotonically. Every generation demands finer alignment, lower loss, higher power, better thermal stability. Tightening specifications shrink the qualified supplier list rather than growing it. This is the opposite of what happens in most electronics categories, where standardisation multiplies suppliers over time.

4. Failure is multiplicative, not additive. The O-ring law from the previous section governs everything. It converts reliability into pricing power and testing into a mandatory toll.

5. It is capital-efficient relative to semiconductors. You are buying alignment machines, cleanrooms and metrology, not $20bn fabs. Returns on invested capital in the component layer can be dramatically better than in logic manufacturing, which matters enormously for compounding.

6. It is bifurcating geopolitically, and both halves need the same inputs. The CPO bloc and the NPO bloc are diverging at the system level and converging at the component level. This is the single most useful structural fact in the sector, because it lets you own an input to a technology war without picking a side.

3 The three business models hiding inside one sector

This is the part the market gets most wrong. Optics is not one business. It is three, and they deserve completely different multiples.

Model A — The assembler (pluggable modules, contract manufacturing)

Buy lasers, DSPs, optics. Integrate into a standard box. Ship millions. Compete on yield, cost and speed to qualify.

• Revenue: enormous. ~$22.8bn addressable in 2026.

• Growth right now: spectacular, triple-digit at the leaders.

• Margins: decent but structurally capped, because the product is standardised and the customer can dual-source.

• Terminal risk: the architecture that follows is explicitly designed to make this product disappear as a separate object.

• What it is: a volume business. Great cyclically, structurally exposed.

Model B — The precision component (FAU, epitaxy, ferrules, TFLN, laser chips)

Sell a part that is physically hard to make, into a design that took quarters to qualify, where failure destroys the customer’s expensive assembly.

• Revenue: smaller. Hundreds of millions per company, not billions.

• Margins: much higher. The ~39% net margin at the FAU leader is the proof, and ~42% gross margin at the connector specialist is a second data point.

• Moat mechanism: switching cost measured not in the price of the part but in the value of what the part might destroy.

• What it is: an annuity business. This is the one I want.

Model C — The infrastructure toll (alignment equipment, test instruments, analysis labs)

Sell the machine or the service that everyone in the industry needs regardless of who wins.

• Revenue: tracks industry capital expenditure, not any single customer’s success.

• Growth driver: the newness of the technology, not the volume of it. Consumption peaks during qualification, which is now.

• Timing property: revenue leads the ramp rather than lagging it. Instruments are bought before wafers run; labs get busy before products ship.

• What it is: a toll on the transition itself. The most weather-proof position in the chain, and where I am starting.

The single most important sentence in this section: the market prices all three of these on optical-components multiples. They are not the same asset.

4 The flywheel

Here is the compounding loop, and it is vicious in the best way.

Every generation tightens specifications. Tighter specifications shrink the qualified supplier list rather than growing it. A shorter list means pricing power at requalification. Pricing power funds the next generation of equipment and process learning. That learning is what qualifies you for the following generation, which is tighter still.

Meanwhile, on the customer side: the more expensive the package being assembled, the more the customer values a supplier who does not fail. Switching cost is not measured in the price of the part. It is measured in the value of what the part might destroy.

That is why I keep calling this a toll booth. The customers almost never leave.

5 Who actually pays: the demand side, stripped bare

Be very clear about where the money comes from, because this is both the strength and the fragility of the thesis.

The ultimate buyers are about six companies. Microsoft, Google, Amazon, Meta, plus the AI labs and the sovereign/neocloud buildouts, with Alibaba, Tencent and ByteDance forming the parallel Chinese demand curve. Not GDP. Not consumers. Not twelve diversified end markets. Six capex committees.

The intermediate buyers are the architects. Nvidia, Broadcom, TSMC, Huawei. They choose the architecture, and therefore they choose which sub-stage gets rich.

The direct customers of our companies are two layers further down still : the packaging houses, the module makers, the foundries. This is why nothing in this article shows up in a search for “Nvidia suppliers”.

And here is the asymmetry that makes the thesis robust rather than merely levered: even a slower AI buildout still forces the copper-to-optics transition, because the transition is driven by power constraints, not by growth. If capital becomes scarce, efficiency becomes more valuable, not less. A world where hyperscalers must do more with fewer megawatts is a world where the optical interconnect gets pulled forward, not pushed back.

Read that twice. It is the difference between “picks and shovels” as a slogan and “picks and shovels” as an actual structural argument.

6 Revenue quality: the questions that actually matter for durability

Is the revenue recurring? Semi and in a better way than recurring. It is design-win driven: once you are in an architecture, you ship for the life of that architecture, and architectures turn over roughly every 18 to 24 months.

Is the growth capital efficient? For the component makers, yes, relative to a foundry. Alignment machines and cleanrooms, not $20bn fabs.

Is the demand real or a bubble? The demand is a derivative of AI capital expenditure, the most debated number in global markets. I will not pretend otherwise. But see 4.5: the transition is power-driven, and power constraints do not soften in a downturn.

Is the customer concentration dangerous? Yes, and it is the honest weak point. It is also visible, quantifiable and shared by every AI-adjacent asset you own, including the ones you paid full price for.

Why the market misses all of this

Everything in that walk is public. The filings exist. The customer literally stood on a stage and named its three bottlenecks out loud. The margins are in annual reports. The record revenue months are press releases.

So why is none of it priced? Not one big reason. Eight small ones that stack.

One. The classification code decides who looks. These companies are filed as “electronic instruments”, “specialty chemicals” or “research services”. A manager building AI exposure screens semiconductors. These names are not rejected — they were never in the sample. And index membership follows the same taxonomy, so passive flows do too.

Two. There is no vocabulary yet. Two years ago nobody could define HBM. Today every generalist can. The technology did not change in those two years; the words did, and the re-rating followed the words, not the physics. Now be honest: before this article, could you have defined a fiber array unit? A market cannot price a bottleneck it cannot name.

Three. Two layers of invisibility, not one. The fiber array maker does not sell to the GPU company. It sells to the packaging house that serves the foundry that serves the GPU company. Each layer halves the number of people looking. And unlike a chip, none of this survives visibly in the product: you can X-ray a phone and find the memory die. You cannot photograph an alignment.

Four. The coverage desert, plus a language wall that is falling. Two analysts on a company inside the most-watched supply chain on Earth. Filings in Mandarin and Japanese, on Taipei Exchange, ChiNext, STAR and Tokyo Standard. That wall was permanent for thirty years. Machine translation just knocked it down, which means this edge is real today and smaller in three years. That is the definition of a closing window.

Five. Liquidity screens run before any human reads a page. No large institution can own a $700m company on a secondary board. Minimum size, minimum volume, minimum float: these filters execute before analysis begins. It is not an inefficiency you can argue with, it is plumbing. And it is why these names can sit still for years, then move 60% in a month when they become eligible.

Six. The market prices four quarters. This inflects in eight. The qualification programmes that decide the winners are running now. The revenue lands in 2027 and 2028. So the future gets filed under terminal value instead of thesis.

Seven. The obvious proxy absorbs the flow. Whoever wants “optics exposure” buys the biggest, most liquid module maker, feels satisfied, and stops looking. The proxy is not a fraud. It is a shield, and it protects the mispricing behind it.

Eight. The word “optics” still carries a trauma. Everyone senior remembers the 2001 telecom bust. But the business model has inverted: the bull case then was “if they build it, traffic will come”. The bull case now is “the traffic is already here and the copper cannot carry it”. Emotional discounts outlive the facts that created them. Fine by me. I would rather buy from someone selling a memory than from someone selling an analysis.

Put the eight together and you get a very specific kind of opportunity. Not a secret. A framework gap. The information is fully public, and it is classified, translated, screened and modelled in a way that makes it structurally hard to see for the people who move prices.

Now let me show you exactly who is sitting inside that gap.

The reveal : the 9 hidden companies quietly shaping the future of the industry

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Why I wrote this

Guys, let’s be honest: if you tried to follow AI news these past three weeks, you drowned. Kimi this, CXMT that, Xi in Shanghai, Bessent threatening sanctions, a gigawatt data center with zero Nvidia inside. Every single day brought a headline that, in any normal month, would have been THE story of the quarter. Instead they piled up so fast that most investors processed none of them.

So I did what I always do when the noise gets deafening: I sat down, pulled every thread, and rebuilt the timeline. What you’re about to read is my structured recap of everything important that happened in Chinese AI since early July, stripped of the noise, followed by my decryption of what it actually means. Because here’s my honest read after assembling it all: we just lived through a genuine turning point in the AI race, and it happened in China. Not a vibe shift. A structural one.

The Timeline: 20 Days That Changed the Race

🗓️ June 29

CXMT, China’s DRAM champion, signs a $3 billion (20 billion yuan) multi-year memory supply deal with Tencent, covering three to five years of server DRAM, with similar talks reported with Alibaba Cloud, ByteDance, Lenovo and Xiaomi. All of this weeks after the US Department of Defense designated CXMT a “Chinese military company.”

➡️ Key takeaway: China’s hyperscalers are pre-buying their domestic memory supply for years ahead. Demand for Chinese chips is no longer patriotic charity. It’s procurement.

🗓️ July 8

Per the FT, Apple begins testing CXMT chips for devices sold in China, and goes further: it is actively lobbying the US government to permit broader use of CXMT’s products. The history makes this remarkable: in 2022, Apple faced fierce pushback from then-Senator Marco Rubio, now Secretary of State, for merely exploring Chinese memory suppliers. The company CXMT is no private upstart either: at least 15 state-owned shareholders collectively hold 36% of it. Per SemiAnalysis data cited by the FT, its global DRAM share is set to climb from ~11% in 2025 to 15% by 2028 as new lines come online in Hefei, Shanghai and Beijing, though its output is largely pre-committed, so no immediate flood of cheap chips. The industry’s real fear is the long game: a repeat of solar panels and EVs, where state-backed capacity expansion eventually crushed global prices and foreign rivals. And one more detail buried in Reuters: the US has held off adding CXMT, DeepSeek and 100+ other flagged companies to its trade blacklist to avoid escalating with Beijing.

➡️ Key takeaway: the most quality-obsessed supply chain on Earth is not just validating Chinese memory, it’s lobbying Washington FOR it. When Apple becomes China’s advocate, the containment coalition has a crack in its foundation.

🗓️ July 14

A double-barreled day that almost nobody connected:

• The Nvidia paradox goes public. US officials confirm the first H200 deliveries have physically arrived in China, but at a Congressional hearing the same day, Commerce official Jeffrey Kessler testifies that shipments remain “negligible” despite roughly $10 billion of export licenses already approved. The number that should stop you cold: Chinese tech companies have collectively ordered more than 2 million H200 chips for 2026, against a total Nvidia inventory of only ~700,000 units, demand outstripping the entire available supply nearly 3 to 1. Lawmakers also press Kessler on a “Blackwell loophole”: Chinese subsidiaries located outside China allegedly acquiring advanced next-gen chips despite the rules.

• DeepSeek reprices itself. The lab enters talks for a new funding round at a ~$71 billion pre-money valuation, about 37% above its previous $52 billion post-money mark, while preparing a mainland China IPO, potentially filed as soon as late 2026 for a 2027 listing.

➡️ Key takeaway: China wants American chips 3x more than Nvidia can supply, Washington can’t decide whether to sell them, and Chinese capital is repricing its AI labs upward anyway. The chokehold leaks from both ends.

🗓️ July 15

• The CXMT IPO files. CXMT files to raise at least 57.9 billion yuan ($8.6 billion) on Shanghai’s STAR Market, up to 66.6 billion with the overallotment, roughly double the ¥29.5B ($4.3B) minimum the FT had initially reported: potentially Asia’s largest IPO of 2026. The prospectus numbers are genuinely insane: Q1 revenue up 719% year over year to 50.8 billion yuan, first-half sales guided at nearly double its entire 2025, already the world’s #4 DRAM maker, backed by the state “Big Fund,” founded by GigaDevice’s Zhu Yiming, with Micron and Samsung alumni at the heart of the operation and the sector’s highest R&D spend as a share of revenue. The honest gap: it still lags on HBM. Meanwhile, PC brands are reportedly rushing to lock CXMT memory with orders stretching to end-2027.

➡️ Key takeaway: China is scaling its memory champion

🗓️ July 16

The pivot date of the month, with two fronts opening in a single day:

• Beijing founds WAICO, its own “UN of AI.” China formally creates the World Artificial Intelligence Cooperation Organisation, headquartered in Shanghai, with 29 founding member states including Brazil, Indonesia, Malaysia, South Africa, Senegal, Russia and Pakistan. UN Secretary-General Guterres attends the launch. Analysts read it plainly: Beijing wants to shape global AI rules at the UN level, backed by the Global South, exactly as Washington retreats from norms-setting.

• Kimi K3 drops, and America’s lead evaporates overnight. Moonshot AI releases Kimi K3: 2.8 trillion parameters, the world’s largest open-source LLM per UBS, beating Anthropic’s Fable 5 and OpenAI’s GPT-5.6 Sol on front-end coding evals and ranking ahead of Opus 4.8 on Arena’s text leaderboard, at 40% lower cost, with open weights scheduled for July 27. Axios: “China just erased America’s AI lead.” SCMP: “another DeepSeek moment.” As recently as April, the US government’s own testing center estimated China sat ~8 months behind the frontier; that cushion just collapsed. Anthropic accuses Moonshot of industrial-scale “distillation” of American models. By Sunday, July 19, demand is so violent that Moonshot suspends new subscriptions to prioritize compute for existing users, and days later Alibaba answers with a Qwen3.8 Max preview at 2.4 trillion parameters.

➡️ Key takeaway: in one day, China opened the governance front and closed the frontier gap. A Chinese lab matched the best closed US models, gave it away nearly free, and ran out of compute before it ran out of customers.

🗓️ July 17

WAIC Shanghai turns into China’s AI coronation. The scale itself is the message: Xi Jinping attends for the first time ever, more than 1,100 companies exhibit, in-person visits top 400,000, and tickets get scalped for over 1,000 yuan. Three fronts in one day:

• Xi takes the stage. He calls open-source AI a “historic opportunity” and declares that “AI development should not be a solo performance by a single country, but a symphony of international cooperation,” a barely veiled jab at Washington, pledging AI capacity-building for Africa, Latin America and Asia and warning against “overstretching the national security concept.” And the structural ace Al Jazeera highlights: China already generates more than twice as much electricity as the US, the one resource AI devours above all.

• Huawei unveils Atlas 950, the “zero America” supercomputer. Revealed at WAIC over July 17-18, the Atlas 950 SuperPoD connects 8,192 Ascend 950DT processors through Huawei’s proprietary UnifiedBus 2.0 interconnect: its most complete demonstration to date that an AI infrastructure can be built, trained and deployed without a single American-origin component. No Nvidia GPU, no NVLink, no InfiniBand. The killer detail: DeepSeek’s latest V4 model has been adapted to run entirely on clusters built with Huawei’s Ascend chips. A frontier Chinese model, trained and served on a fully Chinese stack.

• The showfloor becomes a full-stack demonstration of force. It’s not just Huawei. Biren shows a 1,024-GPU optical (NPO) super node. Enflame displays China’s first glass-substrate CoPoS AI chip sample. Hygon unveils the Sugon 8000, an all-domestic AI supercluster pairing its own general-purpose CPU with its DCU accelerator, with its VP declaring China’s computing industry has moved “from usable to scalable.” One floor up, STEPX demos the Neo, billed as the first large-model-native agentic phone running Step AOS, an operating system rebuilt from scratch for AI agents, already plugged into Meituan, Alipay and Didi via A2A protocols, while an entire floor of robots shifts from party tricks toward inspection, manufacturing and logistics. Chips, interconnects, packaging, superclusters, operating systems, devices, robots: every layer of the stack, all domestic, all on one showfloor.

➡️ Key takeaway: China’s pitch to the world is now explicit and physically on display: our AI is open, cheap, and comes with energy plus a full sovereign stack, from the chip to the agent phone. The Nvidia moat was never just the GPU, it was interconnect plus CUDA, and Atlas 950 attacks all three at once.

🗓️ July 20

Bloomberg reveals that Z.ai (formerly Zhipu, the GLM developer) has completed and partially activated a 1 GW data center built entirely on Chinese-made chips: enough power for ~750,000 homes, among the largest sites any Chinese lab has ever stood up, with multiple clusters above 10,000 chips each, its training history pointing to Huawei silicon after US rules cut it off from H100s and A100s. Context: this blacklisted, Hong Kong-listed company is on track to become the first Chinese AI firm to hit $1 billion in annual recurring revenue, having hit its 2026 sales target in July. Its stock, down ~40% after the K3 shock, rips back +31% intraday on the news. It all sits inside a national plan to spend 2 trillion yuan (~$295 billion) on data centers over five years.

➡️ Key takeaway: the “compute chokehold” thesis is dying in real time. A blacklisted Chinese lab just proved you can train frontier models at gigawatt scale on 100% domestic silicon.

🗓️ July 21

The geopolitical response lands, on three fronts in 48 hours:

• Washington reaches for new weapons. Following Kimi K3, the Trump administration is reportedly reviving a push to restrict or ban Chinese AI models for US companies, citing cybersecurity. Treasury Secretary Bessent goes on Fox Business, calls distillation “theft,” and adds: “we have the ability to sanction them.” Even the Guardian now frames the frontier as a China-versus-Google story, with Bessent expecting a “step-function jump” from Gemini and OpenAI in response.

• Beijing mirrors the weapon. And this is the part almost nobody clocked: China is mulling export curbs on overseas access to its own most powerful models and chips, partly citing concerns about the hacking potential of Anthropic’s unreleased Mythos model.

• The superpowers schedule the summit. Reuters exclusive: the US and China will hold their first official AI talks in September, led by Bessent, likely before Xi’s September 24 visit to the US. A direct outcome of the May Trump-Xi summit.

➡️ Key takeaway: both superpowers now treat AI models themselves as strategic exports to be controlled, like uranium. When your adversary starts restricting exports of the thing, it means the thing has value. China restricting ITS models is the loudest confirmation of the turning point you’ll find.

The Decryption: What This Actually Tells Us About China’s AI Strategy

OK, so that’s the what. Now let’s do the why, because when you stack these events on top of each other, they stop looking like news and start looking like architecture. I’ve sorted every event from the timeline into six strategic categories.

1. Energy and physical infrastructure: the foundation nobody prices

An AI model is an engine. Compute is the drivetrain. But electricity is the fuel, and honestly, this is where the race was quietly decided years ago.

What the news tells us. China generates over twice America’s electricity and is widening that lead through state-led grid investment, while US data center projects fight utilities and local backlash for every megawatt. Now bolt on the 2 trillion yuan ($295B) national data center plan and Z.ai’s 1 GW site, powered up in July, partially operating, and sized like the electricity draw of 750,000 homes.

What it implies for the strategy. Beijing has decided compute abundance is a state utility, like railways in the 19th century or highways in the 20th. When a resource becomes a utility, its price collapses and whoever built the utility captures the economy on top of it.

And notice the second-order move visible all over WAIC: the conversation has shifted from building ever-more data centers to driving down the cost of every single AI query, with companies working specifically on making models trained on Nvidia chips run efficiently on Chinese silicon, and on smarter allocation of existing compute. Even the hype got policed: quantum star Pan Jianwei used his WAIC stage to warn against an industry bubble. China intends to make compute abundant AND cheap the way it made solar panels abundant and cheap. Remember what happened to everyone who competed against abundant Chinese solar? Yeah.

2. Compute and chips: the Nvidia paradox, and the divorce from CUDA

This category got the two most underrated news of the month, so let’s slow down.

The Nvidia paradox (July 14). Read Kessler’s Congressional testimony again: $10 billion of licenses approved, first H200s physically delivered, and yet shipments “negligible.” Meanwhile Chinese firms ordered 2 million+ H200s against ~700,000 in existence. Three things fall out of that, and each one matters:

• Chinese demand for compute is nearly 3x the available American supply. Even with full political goodwill, Nvidia physically cannot serve China. So the domestic-chip push isn’t only ideology, it’s arithmetic. Beijing would need local silicon even if Washington approved everything tomorrow.

• Washington’s control regime is wobbling in both directions at once. It approves licenses it barely honors, while lawmakers uncover a “Blackwell loophole” letting Chinese subsidiaries abroad buy the next generation anyway. A sanctions wall that leaks at the top and bottom isn’t a wall, it’s a toll gate with a broken barrier.

• For Nvidia itself, China is simultaneously its biggest untapped market and its biggest political liability. That tension cannot hold for years. Someone, Washington or Beijing, will resolve it, and China is resolving it first by building the alternative.

The Atlas 950 (July 17-18, WAIC). And here is the alternative, on stage. Huawei’s Atlas 950 SuperPoD chains 8,192 Ascend 950DT processors through UnifiedBus 2.0, Huawei’s own interconnect. Let me translate that for the non-engineers, because this sentence matters more than it looks.

Training an AI is not done by one chip. It’s done by thousands of chips working together as a single giant brain. That requires three things:

• The chips themselves (the GPUs). Think of them as the workers. Nvidia makes the world’s best workers.

• The interconnect (NVLink, InfiniBand). This is the nervous system: ultra-fast wiring that lets thousands of workers talk to each other instantly. Without it, 8,192 brilliant chips are just 8,192 disconnected calculators. Nvidia dominates this too, and honestly it’s the part everyone forgets.

• The software layer (CUDA). This is the language everything is written in. Fifteen years of the world’s AI code was built on CUDA, like the world’s office software was built for Windows. You can build a great rival computer, but if none of the existing programs run on it, nobody switches.

That trinity, workers + nervous system + language, is Nvidia’s REAL moat. Not the chip alone. The whole point of the bull case on Nvidia is that even if someone copies the chip, they can’t copy the other two for a decade.

Now reread the Huawei news. The Atlas 950 delivers the workers (8,192 Ascend chips) AND the nervous system (UnifiedBus 2.0, Huawei’s own wiring) with zero American components. Two pillars out of three, replicated. And the third pillar just cracked too: DeepSeek V4, a frontier Chinese model, has been adapted to run entirely on these Ascend clusters. In plain words: the software made the jump. The programs are being rewritten for the rival machine. A top-tier AI model, trained and served with no CUDA in the loop. That is the software divorce the entire Nvidia bull case assumed was impossible this decade.

What it implies for the strategy. China is executing a pincer: buy American compute wherever the leaky regime allows (2M H200 orders), while building the sovereign stack that makes those purchases optional (Ascend + UnifiedBus + adapted models + Z.ai’s all-domestic gigawatt site). Is Ascend as good as Blackwell? Frankly, no. But the Chinese playbook, the same one from LCD, solar, batteries and EVs, doesn’t need parity. It needs good enough, abundant, and improving faster than you. July ticked every box.

3. Memory: the CXMT masterstroke

This is my favorite layer because it’s the least understood. AI runs on memory as much as on logic, and memory was the last fortress where the US-Korea axis looked untouchable.

What the news tells us. Look at the July sequence as one motion: Tencent pre-commits $3 billion over 3-5 years (June 29). PC makers book orders into end-2027. Apple starts testing the chips (July 8), which is validation money can’t buy. Then an $8.6 billion IPO, Asia’s largest of 2026, funds the next capacity wave, with the state Big Fund anchoring it and ex-Micron, ex-Samsung engineers running it, on revenue growth of +719%.

What it implies for the strategy. To be frank, that’s not a challenger’s trajectory, that’s a coronation in progress. China just demonstrated a self-reinforcing loop:

domestic demand → domestic supply → capital markets funding → better technology → more domestic demand.

The HBM gap is real and I won’t pretend otherwise; CXMT still trails on the memory that feeds AI accelerators directly. But every flywheel starts with commodity volume and climbs. Samsung started with cheap DRAM too.

4. Models: open weights as economic warfare

What the news tells us. Kimi K3 lands near the frontier, beats Fable 5 and GPT-5.6 Sol on coding, costs 40% less, and goes open-weight on July 27. Alibaba answers with Qwen3.8 Max at 2.4 trillion parameters within days, and per Bloomberg plans to publish its weights too. DeepSeek’s V4 runs on fully domestic hardware. And demand is so violent that Moonshot has to pause subscriptions.

What it implies for the strategy. This is not a series of product launches, guys. It’s a coordinated economic doctrine, and it has a financier: Beijing subsidizes computing resources and power consumption for its AI startups, which is what lets them release frontier-class models free of charge. The logic is brutally simple: if you can’t beat US models on capability, beat them on cost and undercut companies that, unlike you, eventually need to earn a profit. It’s the exact playbook Chinese manufacturers ran in every industry, now applied to intelligence itself, and it mirrors the broader trade war move for move. Remember: DeepSeek already triggered a US market panic last year. This is round two, at scale.

And here’s why it works, economically. Most corporate AI work simply does not need the smartest model on Earth. Mozilla’s CTO compared using frontier AI for routine tasks to “driving a Ferrari to Whole Foods”: for everyday coding, summarization, extraction and support, cheaper models are fast enough and can cost up to 50 times less. One AI investor put the endgame in numbers: open-source models eventually handling 95% of enterprise queries, with the remaining 5% going to OpenAI or Anthropic. Kong’s CEO confirms open-weight usage surged this past quarter because flagships are “too expensive.” SCMP, itself Alibaba-owned, summed up the pivot: as US AI costs soar, global businesses are shifting to China’s low-cost, open-weight models. That’s the Gutenberg move: you don’t beat the monks who copy manuscripts by hiring better monks, you build the printing press and give the books away.

The speed is the scariest part for Washington. In May, Anthropic’s Dario Amodei estimated China sat six to twelve months behind on the most dangerous capabilities. Ten weeks later, Moonshot shipped a model rivaling Anthropic’s and OpenAI’s flagships. Any American lead now has a measured half-life of one quarter.

And Silicon Valley knows it: America’s own counter-moves this month are, tellingly, imitations of the Chinese doctrine: Mira Murati’s Thinking Machines debuting with an open-weight model built for customization, Nvidia expanding its open Nemotron family, SpaceXAI open-sourcing its Grok Build coding agent. When your rival’s strategy becomes your strategy, the rival set the terms. Xi calling open source a “historic opportunity” isn’t philosophy. It’s pricing strategy at civilizational scale.

5. Capital markets: the STAR Market becomes a weapon

What the news tells us. CXMT raising $8.6B in Shanghai. DeepSeek negotiating a round at $71 billion pre-money, up 37% from its $52 billion post-money, with a mainland IPO potentially filed late 2026 for 2027. Z.ai listed in Hong Kong, first Chinese AI firm tracking $1B ARR, stock swinging -40% then +31% in a week. Moonshot backed roughly one-third by Alibaba.

What it implies for the strategy. Notice the pattern: China is now recycling its own savings into its own AI stack through its own exchanges, exactly as US-listed access gets politically messy. The Big Fund seeds, the hyperscalers pre-order, the public markets scale, and the valuations reprice upward domestically without a single Western fund needing to participate. The DeepSeek round is the proof point: a 37% markup in months, priced in China, for a lab whose flagship model runs on Chinese chips. It’s vertical integration of capital itself. And for us investors, those violent Z.ai-style swings are the signature of a young, inefficient, under-covered market. That’s not a bug. That’s where alpha lives.

6. Political strategy and governance: writing the rulebook while arming the border

What the news tells us. WAICO founded with 29 member states and the UN Secretary-General in the room (July 16). Xi’s “symphony” speech pledging capacity-building for the Global South (July 17). Washington reviving a push to restrict Chinese models and Bessent threatening sanctions over “distillation theft” (July 20-21). And, the mirror image, Beijing mulling export curbs on its OWN top models and chips, citing among other things Anthropic’s Mythos. Capping it all: the first official US-China AI talks in September, Bessent leading, before Xi lands in Washington on September 24.

What it implies for the strategy. Read those together and the posture is unmistakable: Beijing positions itself simultaneously as the generous supplier of open AI to the developing world AND the gatekeeper of its most powerful systems. You don’t gatekeep something worthless. A country restricting the export of its own AI models is a country that believes, correctly or not, that it now owns strategic technology. And it’s governing at home with the same discipline: the July 15 anthropomorphic-interaction rules, the May agent guidance with digital identities for AI agents, a WAIC where safety forums ran alongside product launches. As Concordia AI’s Brian Tse put it, China is positioning itself as an “architect of multilateral AI governance.”

Now contrast that unified front with Washington, because honestly, the American side of this month reads like chaos. OpenAI’s policy head Dean Ball warns that Beijing’s open-weight approach leads to “full AI communism” with state data centers serving AI as a public good; the Pentagon’s own CTO Emil Michael responds by publicly calling Ball the AI industry’s “supreme village idiot.” Trump preached total deregulation until recently, yet the White House now restricts even ALLIES’ access to Anthropic’s and OpenAI’s advanced cyber models. The director of the administration’s own AI standards center, Chris Fall, resigns three months into the job. Legendary VC Bill Gurley breaks ranks in the Washington Post to argue Chinese models “aren’t a security threat, they’re what competition looks like.”

There is, frankly, zero alignment between America’s frontier labs, its government, and its investors. Beijing shows up as one actor with one doctrine. Washington shows up as five actors with five doctrines, insulting each other in public. In a strategic competition, coherence is itself a weapon, and right now only one side has it. And the Kessler hearing shows the enforcement regime at its weakest: a licensing system that approves $10B on paper, delivers crumbs in practice, and leaks through Blackwell-shaped holes, all while preparing to negotiate. That’s not containment. That’s improvisation.

Put all six categories together and the strategy is almost embarrassingly legible: full-stack sovereignty. Energy, silicon, memory, models, money, rules. The US built its AI dominance like a luxury car brand: closed, premium, marginally better every year. China is building it like Toyota in the 1970s: cheaper, open, mass-produced, and improving at a rate the incumbent refuses to take seriously until it’s too late.

The Big Picture: Where the Race Actually Stands

So where does this leave us? Let me be blunt about my read.

The race has split in two. On one side: a closed, premium, capital-devouring American model economy, betting everything on staying 6-12 months ahead at the frontier. On the other: an open, cheap, state-backed Chinese model economy, betting that “good enough for 90% of use cases at 40% of the price” wins the world. Both can be right at the frontier. Only one can win the volume game, and history, from LCD panels to solar to EVs, tells us which strategy wins volume.

The lead is gone as a strategic asset. Even if GPT-6 and Opus 5 restore some distance, and they probably will, July proved China can close any gap in months, not years. Bessent said the US can negotiate “because we are in the lead.” Honestly? After Kimi K3, that sentence has a shelf life. When both sides start restricting exports of their models and sit down for official talks in September, that’s not a leader managing a laggard. That’s two nuclear powers negotiating arms control. The symbolism alone tells you the race changed.

China’s one remaining constraint is effective compute. Moonshot pausing subscriptions is the tell: models are no longer the bottleneck, flops are. Which is exactly why the 2 trillion yuan plan, the Z.ai gigawatt site and the domestic chip push all landed in the same month. China has identified its last constraint and is carpet-bombing it with capital. If I’ve learned anything watching Chinese industrial policy, it’s this: when Beijing names a bottleneck, short the bottleneck.

And the stakes are now macroeconomic, not just corporate. Here’s the part that should keep US investors up at night: OpenAI and Anthropic are preparing blockbuster IPOs whose valuations depend on frontier AI staying scarce, indispensable and lucrative. Cheap open Chinese models attack all three adjectives at once. And this isn’t contained to Silicon Valley: AI spending is carrying an outsized share of US economic growth, and the stock market has become dangerously dependent on a small group of companies riding the boom. If businesses really can get 95% of what they need from cheap models they control, the premium pricing, and the trillion-dollar valuations built on it, gets very hard to justify. Mozilla’s CTO said it plainly about the US labs facing this wave: “They’re clearly terrified.” When the people building the moats tell you the attackers are through the gate, believe them.

And the US faces a genuinely messed-up dilemma. Ban Chinese models at home and you protect your labs while ceding the entire rest of the world to open Chinese weights. Regulate your own labs harder and you slow them exactly as China accelerates. Loosen everything and you race to the bottom on safety. There’s no clean move on the board, and Beijing knows it.

Where the Money Goes Next: The Opening

Now for the part you actually came for. If July 2026 was the turning point, then the next great pool of mispriced opportunity in global tech is, I’m convinced, Chinese AI equities and their supply chain. The Z.ai stock whipsaw (down 40%, up 31% in days) tells you this market is violently inefficient right now, which is exactly what we hunt at Asia Next.

Analysts are already converging on Alibaba as the cleanest full-stack play (frontier Qwen models soon open-weighted, cloud, custom silicon, plus equity stakes across labs like Moonshot), but honestly, the really asymmetric stuff sits deeper in the stack. WAIC gave us a perfect preview of how complete that stack already is: Hygon building the all-domestic computing foundation (its Sugon 8000 supercluster pairs its own CPUs with its own accelerators), STEPX rebuilding the operating-system layer for AI agents, Fisherman Info securing the data layer with full-lifecycle sovereignty and traceability. Compute, OS, security: three companies, three layers, one ecosystem in the making. Add the memory flywheel around CXMT, the accelerator chain around Huawei’s ecosystem and Cambricon, the optical and packaging layer, and the data center buildout feeding on 2 trillion yuan.

That deserves more than a paragraph. In a next article, I’ll map the entire Chinese AI ecosystem for you, layer by layer, player by player, listed ticker by listed ticker, with the same bottleneck-first method we used on silicon wafers. Who’s investable, who’s a trap, who’s the hidden champion nobody outside China can name. Consider this article the situation room briefing. The targeting map comes next.

Synthesis, and My Honest Take

Let me compress twenty days into seven sentences.

• China matched the American frontier and open-sourced it.

• China proved it can train at gigawatt scale without Nvidia, and Huawei’s Atlas 950 showed the full stack, 8,192 chips, interconnect included, with zero American components, running DeepSeek V4.

• China ordered three times more H200s than Nvidia can supply while Washington’s own licensing regime delivered crumbs and leaked through a Blackwell-shaped hole.

• China funded its memory champion with Asia’s biggest IPO while Apple tested its chips.

• Chinese capital repriced DeepSeek 37% higher on its way to a mainland listing.

• China founded a 29-nation body to write global AI rules. And both superpowers responded by treating AI models like strategic weapons and scheduling arms-control talks for September.

My take, with full intellectual honesty: I genuinely believe historians will point at July 2026 the way they point at Sputnik in October 1957. Not because China “won,” it hasn’t, the frontier will keep ping-ponging and American labs are still extraordinary. But because this is the month the assumption of durable American superiority died, publicly, measurably, on leaderboards and in prospectuses. Sputnik didn’t mean the USSR won space. It meant the race was real, symmetric, and would reorder capital flows for a generation. That’s where we are.

And like every investor staring at a Sputnik moment, you have two options: keep pricing the world as if the old lead still exists, or reposition for the world where two full AI stacks compete for every market on Earth. The first option is comfortable. The second is where the returns are. The crowd is still staring at the closed American stack trading at 30-50x earnings; the open Chinese stack, with its chips, memory, data centers and models, is barely covered by Western analysts at all. Undervalued today, indispensable tomorrow: you know the motto.

Skin in the game: I’m actively building my watchlist of Chinese AI names as I research the next issue, and I’ll disclose openly what I end up buying, sizing it as speculative given the very real geopolitical, regulatory and VIE risks that come with this market. Because let’s not romanticize: investing in Chinese tech means accepting policy risk that can vaporize a thesis overnight, delisting risk, sanction risk, and information asymmetry. That’s the price of the asymmetry. I think, for the first time since 2021, it’s a price worth analyzing seriously.

The turning point happened. The only question left is who repositions first.

If you made it this far, thank you. I hope I helped you decrypt this crazy news cycle and walk away with the right takeaways. Next issue, same mission: either decoding the news that matters or deep-diving into a tech bottleneck and unveiling Asia's hidden champions of tomorrow. Don't miss the reveal: subscribe below.

Sources: Axios (Jul 17 and follow-ups on enterprise open-weight adoption and the US model-restriction push); The Guardian (Jul 20: China-Google framing, Beijing’s subsidy strategy, Dean Ball / Emil Michael exchange, Chris Fall resignation, Bill Gurley in the Washington Post); Al Jazeera (Jul 17); Sixth Tone (WAIC takeaways: scale, computing efficiency, governance rules, Brian Tse/Concordia AI); CGTN (Jul 20: Hygon Sugon 8000, STEPX Neo/Step AOS, Fisherman Info); Reuters via CNBC, Yahoo Finance, Rappler and Quartz (Jul 21); CNBC on Bessent (Jul 21 and May 14); CNBC/FT on Apple testing and lobbying for CXMT (Jul 8: Rubio precedent, 36% state ownership, SemiAnalysis 15% share by 2028, blacklist holdout); US Congressional testimony of Commerce official Jeffrey Kessler on H200 shipments and the Blackwell loophole (Jul 14, as reported); reports on DeepSeek’s ~$71B pre-money funding round and mainland IPO plans (Jul 14); Huawei’s Atlas 950 SuperPoD unveiling at WAIC 2026 and DeepSeek V4 adaptation to Ascend clusters (Jul 17-18, as reported); Investing.com/Reuters on the CXMT IPO (Jul 18); The New York Times and TradingView/GuruFocus on CXMT (Jul); Huawei Central and Reuters on the Tencent deal (Jun 29); Bloomberg via TradingView, Tom’s Hardware, TheNextWeb, BigGo Finance and Seoul Economic Daily on Z.ai’s 1GW data center (Jul 20-21); SCMP on Kimi K3 and the enterprise pivot to Chinese open-weight models (Jul); DigiTimes (WAIC 2026, DeepSeek IPO, CXMT prospectus, Xi’s Sovereign AI strategy, Jul); Capacity Global and Techzine on Chinese export-control deliberations; AP News; coingape (corroborated by Tom’s Hardware); UBS and China Merchants Securities International as cited.

Disclaimer: This publication is independent analysis for informational purposes only. It is not investment advice nor a personalized recommendation within the meaning of AMF regulations. Chinese equities carry specific risks including regulatory, delisting, sanction and VIE-structure risks. Past performance is no guarantee of future results. Do your own research.

If you are new here, welcome to Asia Next. We uncover Asia’s most overlooked investment opportunities: hidden world leaders quietly controlling a vital bottleneck of the global tech supply chain, companies whose world-first technologies no competitor can replicate, and strategic players no headline ever mentions. Undervalued today, indispensable tomorrow: that’s where the real upside hides.

This week, we dive into the layers of the AI chip supply chain and focus on a vital bottleneck: wafers.

Every AI breakthrough, every cutting-edge GPU, and every advanced semiconductor starts with something surprisingly simple: a silicon wafer.

It is a component that rarely makes headlines, yet it sits at the very foundation of the AI revolution. In this edition, we take a deep dive into one of the most overlooked and potentially most profitable links in the semiconductor value chain.

Inside this edition:

• Why silicon wafers have become one of the industry’s most critical bottlenecks and why this is not a pricing story.

• The trillion-dollar clue EVERYONE missed

• The hidden market structure: how just two Asian companies control roughly half of global production.

• The dark horse quietly feeding Micron : the third name that just became the memory giant's irreplaceable American engine and is positioned to overtake both Japanese leaders in the years ahead.

• Why the market filed this in completely the wrong box

• The investment case: why these businesses deserve a place on every long-term semiconductor watchlist and potentially in your portfolio.

• The key risks that could challenge the thesis and what to monitor.

• Our biggest takeaway: the one insight we believe the market still underestimates.

Let’s X-RAY one of the most essential and least understood building blocks of the AI economy.

While the World Stares at Nvidia, Asia Holds the Disc Everything Is Built On

The market has memorized one story. Nvidia designs the GPUs, TSMC fabricates them, SK Hynix stacks the memory, and hyperscalers buy everything the moment it exists. Trillions of dollars of market capitalization have been re-rated around this narrative, and every quarter the same tickers absorb the world’s attention like a gravitational field.

It is a comfortable consensus. It is also incomplete.

Because before TSMC can etch a single transistor, before a single layer of HBM can be bonded, someone has to hand them a disc of crystalline silicon so pure that impurities are measured in parts per trillion, so flat that its tolerances are the equivalent of a football field varying by less than a millimeter. Every chip on Earth, every GPU, every DRAM die, every power controller in every AI data center, begins its life on one of these discs.

The bottleneck is the wafer itself: the one component of the AI supply chain that everybody uses and nobody prices.

If the supply of advanced 300mm wafers stopped tomorrow, the entire semiconductor industry would halt within months. Not slow down. Halt. There is no substitute material at scale, no alternative process, no strategic reserve.

And AI is only the accelerant. The same discs feed every smartphone, every electric vehicle, every pacemaker, every 5G base station and every solar inverter on the planet. The toll booth does not span one boom. It spans the entire electronic economy.

And here is what should stop you cold: more than half of the world’s wafer supply is controlled by just two companies, both listed in Tokyo, both absent from every AI headline you have read this year. One of them hides its crown jewel inside a chemicals conglomerate. The other is posting quarterly losses at what may be the exact bottom of its cycle, while the chairman of SK Group publicly warns that wafer supply, not GPUs, not lithography, is the constraint that could keep HBM in shortage until 2030.

I will not name them yet. First, you need to understand why they matter, because the reveal only lands once you have walked the chain yourself.

I did not arrive at this thesis by screening for cheap stocks. I arrived at it by walking down the AI value chain, layer by layer, asking at each step: what does this layer consume, and who makes it? Every path, logic, memory, power, sensors, terminated at the same unglamorous object. When every road leads to the same toll booth, you go look at who owns the toll booth. I hope I’m early. I’m afraid I’m on time.

Seventy Years of Silicon: How Japan Quietly Cornered the Substrate of Computing

The long consolidation

Silicon wafers are not new. The industry has grown chips on silicon discs since the 1950s, using essentially the same core technique, the Czochralski method, for seven decades. Through the 1990s a dozen manufacturers competed. Brutal cyclicality, crushing capital intensity, and the transition from 200mm to 300mm diameters consolidated the field into five survivors: two Japanese giants at the top, a Taiwanese consolidator, Germany’s Siltronic, and Korea’s SK Siltron.

The past decade compressed the drama:

2016-2018. The first modern wafer squeeze. Prices rose for the first time in years. Chipmakers, burned, began signing multi-year long-term agreements, the LTAs that still structure the market today.

2020-2022. The pandemic chip shortage turned wafers into strategic assets. The Taiwanese number three attempted to acquire Siltronic, a deal that would have created a true challenger to the Japanese duopoly. German regulators blocked it in early 2022. The lesson: even consolidation in this industry is now geopolitically forbidden.

2019-2024. Washington’s escalating restrictions on Huawei and SMIC convinced Beijing that every layer of the supply chain, wafers included, must be localized. China’s 14th five-year plan explicitly designates silicon wafers as a self-sufficiency priority, with import-tax waivers on cleanroom materials and production equipment for wafer plants.

2023-2025. A painful downcycle. Inventory gluts in legacy chips crushed volumes and prices. SEMI’s Silicon Manufacturers Group reports industry revenue of $11.4 billion in 2025, down 1.2%, even as shipment area grew 5.8% to 12,973 million square inches. That is the signature of a market shipping more silicon for less money. It is also the signature of a bottom.

The “why now” inflection

Three things changed within the last eighteen months.

First, AI demand went vertical while legacy demand bottomed. Q1 2026 global shipments hit 3,275 million square inches, up 13.1% year on year, and SEMI projects a record 15.49 billion square inches by 2028 on AI data center construction. SEMI’s own chairman describes 300mm demand for AI logic and HBM as strong and structural, driven by sub-3nm adoption, while 200mm remains sluggish. A two-speed market that punishes legacy exposure and rewards advanced-node purity.

Second, the customers started panicking in public.

SK Group chairman Chey Tae-won told reporters that HBM shortages largely stem from wafer supply constraints: “It takes at least four to five years to secure additional wafer capacity.” He warned the HBM shortage could persist through 2030. Read that again. The bottleneck for the scarcest commodity in AI is not the bonder, not the fab. It is the substrate.

Meanwhile, Micron just committed up to $3 billion to its supply-chain ecosystem, including $500 million of direct financing to its wafer supplier, tied to a 10-year supply agreement. A memory maker literally paying its substrate vendor to build capacity. Customers do not finance suppliers in commodity markets. They finance suppliers in choke points.

Third, the geopolitical board flipped. Roughly 90% of all silicon wafers are produced in Asia. The United States produces a marginal share, and exactly one company is currently capable of making advanced 300mm wafers on American soil. Simultaneously, China moved from subsidizing wafer startups to something harder: an unspoken mandate, reported by Nikkei Asia, pushing domestic chipmakers to buy local wafers and aiming to source over 70% of advanced wafers domestically by 2026, leaving only about 30% of the Chinese market open to overseas suppliers.

PESTEL snapshot of the subject

• Political: CHIPS Act subsidies in the US versus five-year-plan incentives in China. Wafers now sit inside both industrial policies.

• Economic: extreme capital intensity. A greenfield 300mm plant costs billions and takes four to five years to qualify and ramp. This is why supply cannot chase demand.

• Social: an ultra-specialized crystal-growth workforce concentrated in Kyushu, Fukushima, Hsinchu and a handful of towns. Talent is as concentrated as capacity.

• Technological: sub-3nm nodes and HBM stacks tighten flatness, defectivity and uniformity specs every generation. Quality inflation structurally favors incumbents.

• Environmental: energy- and water-hungry crystal pulling. Decades of process-efficiency learning are themselves a cost moat.

• Legal: the blocked 2022 merger set the precedent. Antitrust and national security now freeze the industry’s structure in place, protecting the leaders by law.

One Millimeter Thick, Impossible to Copy: Anatomy of the Prime Wafer

A first-principles primer

The value chain runs: quartz, then polysilicon, then crystal growth, then wafering, then chipmaking. Ultra-pure quartz, much of it from a single American site called Spruce Pine, a bottleneck inside the bottleneck, becomes hyper-pure polysilicon. That polysilicon is melted in a crucible at roughly 1,400°C. A seed crystal is dipped and slowly rotated upward, pulling a single monocrystalline ingot: the Czochralski method. The ingot is sliced with diamond wire, ground, edge-profiled, polished to sub-nanometer roughness, inspected, and often finished with an epitaxial layer.

Two product families matter.

Polished wafers are the workhorses of memory: DRAM and NAND.

Epitaxial wafers carry an additional defect-free crystal layer and feed logic: CPUs, GPUs, AI accelerators.

The AI boom is, mechanically, a boom in premium epitaxial and prime polished 300mm wafers.

Why this cannot be replicated quickly

The physics is public. The process learning is not. Growing a 300mm ingot with uniform resistivity, controlled oxygen content and zero dislocations is a control problem tuned over decades: thermal gradients, pull speeds, crucible behavior, dopant chemistry.

Then comes the killer: qualification. A prime wafer for leading-edge production must be certified by each customer, fab by fab, in cycles that run from multiple quarters to years. Korean industry officials note that even Samsung and SK Hynix are merely evaluating Chinese wafers today. Testing, not mass production. A Hanyang University semiconductor professor puts it plainly: top-tier fabs like TSMC will keep sourcing prime wafers from established suppliers because the technology gap remains substantial.

This is the distinction the market ignores. Test wafers versus prime wafers. Anyone with capital can eventually ship test-grade silicon. Almost nobody can ship device-grade prime wafers for 2nm logic. The former is a commodity. The latter is critical infrastructure.

Not just AI: the full demand stack

Here is the part that makes this thesis sturdier than a pure AI trade. Wafers are not an AI story with a market attached. They are the substrate of the whole electronic economy, and every major end market is pulling on the same supply.

Per Precedence Research, the broader semiconductor wafer market is worth $23.8 billion in 2025 and is projected to reach $41.3 billion by 2035, a steady 5.66% annual compounding driven by far more than data centers:

• Consumer electronics remains the dominant application: every smartphone, laptop, TV and wearable consumes wafers.

• Automotive is the fastest-growing segment: electrification multiplies semiconductor content per vehicle, with power electronics for motors, battery management and charging, plus ADAS sensors and cockpit chips.

• Telecom and 5G demand specialized RF and networking silicon.

• Healthcare increasingly runs on chips, from diagnostics to implants and monitoring.

• Industrial, IoT and renewables add relentless baseline demand: smart grids, energy storage and factory automation all need wafers able to handle high currents and voltages.

By product, memory holds the dominant share while processors grow fastest, and the 12-inch wafer dominates because it yields more chips per disc at lower cost per die.

The investment translation: the wafer makers own a diversified annuity on global electronics, with the AI surge stacked on top as the cyclical accelerator. If AI capex pauses, cars, phones, grids and hospitals keep consuming silicon. That multi-sector floor is precisely what a pure GPU or model play does not have.

Quantifying the choke point

• Top five suppliers: 80 to 90%+ of the global market. In 300mm specifically, the top five hold roughly 80% of capacity and the top ten over 92%.

• The world leader holds about 33% of the market and its Japanese compatriot about 30%. Two companies, more than half the world’s supply.

• Global 300mm capacity in 2025: roughly 8.4 million wafers per month, of which Japan alone hosts 3.2 million (38%), Taiwan 1.9 million (23%), Germany 14%, Korea and mainland China about 12.5% each.

• Lead time to add capacity: four to five years.

• Pricing: global 12-inch wafers sell for $60 to $80 on contract, with legacy LTAs still running $80 to $90, against production costs above $50. Chinese entrants sell at $40 or below, under the incumbents’ cost floor, a strategy only possible with state support.

• Cost of failure: without prime 300mm supply, every advanced logic and memory roadmap on Earth stops. There is no plan B substrate at scale this decade.

The layered cascade

Walk the transmission mechanism downward.

Layer 1, direct: a wafer shortage caps fab output regardless of how many EUV machines or TC bonders exist. Equipment utilization collapses onto substrate availability.

Layer 2, memory: HBM, already the scarcest AI input, is wafer-gated. Hence the SK chairman’s warning about 2030.

Layer 3, compute economics: GPU supply caps translate into higher training costs and delayed model generations. The marginal wafer becomes the marginal token.

Layer 4, strategic: nations discover that chip sovereignty without wafer sovereignty is theater. The result: subsidies, mandates and customer pre-payments, which is precisely what CHIPS grants, memory-maker financing deals, and Beijing’s localization drive are.

Layer 5, pricing power: LTA renewals in an AI-tight market shift value upstream. The industry leader has already signaled that rising input costs will be passed through as price increases, and that customers are approaching it for new long-term agreements covering 2027-2028 fab ramps it describes as at levels not seen in recent years.

Why the market misses it

Category misfiling, four ways. The world number one is filed as a diversified chemicals conglomerate, so its wafer crown jewel is consolidated into vinyl and silicones. The number two is filed as a cyclical loss-maker, because at the cycle trough, with depreciation from its advanced-node capex peaking, it literally is one. The Taiwanese number three is filed under Taiwan hardware beta. And the wafer industry as a whole is “boring”: no keynotes, no benchmarks, minimal sell-side celebrity coverage.

The bear case is known to the last decimal. The bull case is s

till filed under miscellaneous.

Germans in Retreat, Koreans for Sale, Chinese Burning Cash: The Siege of the Silicon Fortress

Who is trying to control this choke point?

The incumbents’ second tier

Siltronic, Germany’s number four with roughly 12 to 17% share, posted Q1 2026 sales of €306.5 million, down 17.5% sequentially, with a €66.8 million loss, and is raising capital to keep expanding. SK Siltron, the number five, is in limbo: Doosan Group announced in May 2026 it would acquire it from SK, and the deal has reportedly stalled. France’s Soitec, the SOI specialist, saw FY26 revenue fall 34% to €592 million with a €220 million loss and changed CEOs.

The second tier is structurally squeezed: too small to out-invest the leaders, too exposed to legacy nodes, and first in the blast radius of Chinese price competition. Industry analyst Mark LaPedus sums up the endgame: too many suppliers, a market ripe for consolidation, with SK Siltron and others as likely targets.

The Chinese challengers

This is the fascinating, over-hyped and widely misunderstood corner of the map, so let’s differentiate the challengers properly.

Eswin Material Technology (Xi’an) is the flagship. Reshaped after BOE founder Wang Dongsheng joined its parent in 2019, it is now China’s largest domestic wafer maker: about 7% of global 12-inch capacity at the end of 2024, targeting 1.2 million 12-inch wafers per month by 2026, enough for roughly 40% of Chinese demand and a claimed global share above 10%. It supplies SMIC and Hua Hong, ships to UMC, GlobalFoundries, Powerchip and even Micron and TSMC, for what the industry believes are largely test and mature applications, while Samsung and SK Hynix evaluate its products.

The catch: 2024 revenue of RMB 2.12 billion, up 43.9%, came with a net loss of RMB 737.6 million. Eswin loses roughly one yuan for every three it books, and its STAR Market IPO is explicitly a funding lifeline. The company itself concedes wafer-making takes years to reach breakeven.

NSIG (National Silicon Industry Group), STAR-listed since 2020, holds over 6% of the global market and just announced a CNY 11.45 billion ($1.6 billion) capital injection into its core subsidiary Shanghai Xinsheng, a restructuring aimed, per DigiTimes, at stemming losses in its wafer business. Serial capital raises tell you the model: state-adjacent capacity building first, profitability later, maybe.

Behind them: Zhonghuan Advanced (unlisted), Hangzhou Lion (loss-making), Wafer Works Shanghai (STAR IPO approved), Shanghai Simgui. Bernstein estimates China already covers more than 50% of 12-inch demand from local chipmakers, 80% in 8-inch, and that China’s share of global capacity could reach one third by 2026.

Why most challengers fall short

They win where flatness specs are loose: mature nodes, driver ICs, power devices. They price 10 to 15% below Japanese peers, or at $40 against a $50+ cost floor. That is market-share warfare, the same playbook China ran in LED, LCD and solar: build capacity, buy share, consolidate later.

It is genuinely dangerous for Siltronic, for SK Siltron, for anyone’s legacy 200mm book. But it does not touch the prime-wafer fortress. JP Morgan’s Asia tech research co-head notes that competing in cutting-edge wafers requires an expertise that makes comparisons with mature wafers not apples-to-apples. SEMI’s market-intelligence chief, while warning it is only a matter of time before Chinese suppliers catch up, confirms non-Chinese chipmakers today use them mainly for test runs.

So the funnel narrows. If the AI decade is gated by prime 300mm wafers, the structural answer sits with exactly three companies. Two in Tokyo. One in Hsinchu. It is time to name them.

The reveal : Tokyo’s Silent Duopoly, Taiwan’s Arbitrageur, Beijing’s Challengers

Shin-Etsu Chemical |The fortress that doesn’t need you

The world number one is Shin-Etsu Chemical, a Tokyo conglomerate of more than 100 companies that happens to be, simultaneously, the world leader in PVC resin, in silicones, in photoresists, in photomask blanks, and, through its Shin-Etsu Handotai (SEH) unit, in silicon wafers, with roughly 33% of the global market.

The technology. SEH sets the industry’s purity standard, with contamination measured in parts per trillion, and its wafer franchise is overwhelmingly advanced: silicon revenue of about ¥580 billion ($3.9 billion) comes almost entirely from 300mm wafers for leading-edge logic and memory, earning a gross margin around 28%, the best economics in the industry. Its unique structural advantage is vertical synergy: Shin-Etsu supplies fabs not just the wafer, but also the photoresist coated onto it and the photomask blank used to pattern it. No competitor on Earth offers that materials triangle.

The operations. Production is anchored in Japan at Shirakawa (Fukushima), Takasaki, Isobe and Takefu, with international sites in Malaysia and the United States, including a 300mm plant in Malta, New York and an SOI and epitaxial site in Salem, Oregon. In November 2025 it committed ¥150 billion (about $1 billion) to add 200,000 ultra-flat 300mm wafers per month at Shirakawa and Takefu, explicitly targeting 2nm and 3nm nodes.

The financials. Fiscal year ended March 2026: net sales ¥2,573.9 billion ($15.8 billion), up 0.5%. Net income ¥474.4 billion, down 11%, which still represents an 18% net margin at the bottom of a materials cycle. The balance sheet is a fortress of cash, currently funding a ¥500 billion share buyback announced in April 2025.

Why it is an opportunity despite the cycle. You are buying the wafer duopoly wrapped inside a AAA chemical conglomerate, at conglomerate multiples. The market prices Shin-Etsu off PVC and silicone cycles, while management quietly reports customers reopening long-term agreements and 2027-2028 fab ramps at levels not seen in recent years. The wafer option costs you approximately nothing. Lower beta, lower purity, highest quality: the misfiled asset par excellence.

SUMCO | The pure player at maximum pessimism

The world number two is SUMCO, born in 1999 from the merger of the wafer operations of Mitsubishi Materials and Sumitomo Metal Industries, and today the only large-cap pure play on this thesis, with roughly 30% of the market.

The technology. Where Shin-Etsu is the all-rounder, SUMCO is the epitaxy specialist: advanced epitaxial wafers for leading-edge logic and prime polished wafers for DRAM, supported by proprietary processes such as Stress Adjustment Annealing for the dimensional stability that multi-patterning and sub-3nm nodes demand. Industry research notes that AI-grade substrates now absorb about half of its R&D budget. Its wafer revenue of about ¥380 billion ($2.5 billion) carries a gross margin around 24%: below Shin-Etsu, above everyone else.

The operations. Concentrated in Kyushu and northern Japan: Imari (Saga), Ikutsuki (Nagasaki) and Yonezawa (Yamagata), plus a long-standing Taiwanese joint venture, Formosa Sumco, that keeps it physically close to TSMC. Management is currently executing the most aggressive portfolio surgery in the industry: terminating all 200mm production at Miyazaki by late 2026 to concentrate entirely on AI-grade 300mm, cancelling two planned greenfield plants in Saga in favor of upgrading the existing Imari site, accepting reduced subsidies in exchange for capital discipline, and handing leadership to a new president, Jiro Ryuta.

The financials, honestly. FY2025: revenue ¥409.6 billion, ordinary loss ¥3.8 billion, net loss ¥11.7 billion. Q1 2026: sales ¥101.4 billion, net loss ¥8.4 billion, EBITDA margin compressed to about 23%. Ugly, and precisely mapped: the losses come from depreciation on massive advanced-300mm investments arriving before the AI revenue, plus inventory digestion in legacy products.

Why it is an opportunity despite the losses. This is the whole point of the thesis. A pure player’s earnings are leverage on the cycle, in both directions. Today you see the down-leverage: capex-driven depreciation meeting trough volumes. Tomorrow, the same leverage flips: as AI-grade mix rises and the depreciation peak passes, incremental revenue drops to the bottom line against a trough-cost structure. An EBITDA margin of 23% in a loss year tells you what normalized economics look like. Japanese investor analysis frames the pair perfectly: Shin-Etsu is stability and capital strength, SUMCO is purity and cycle sensitivity, the model with the highest earnings torque when AI demand and the depreciation rollover cross. The market has fully priced the melt and priced none of the build. At today’s valuation you are paying a loss-maker’s price for 30% of the world’s most critical substrate.

GlobalWafers | The geopolitical arbitrage

The number three is GlobalWafers of Hsinchu, roughly 15 to 18% of the market, playing an entirely different game: becoming the West’s wafer champion.

The story and the operator. Spun off from Sino-American Silicon in 2011, GlobalWafers was built by serial acquisition under chairwoman Doris Hsu, one of Asia’s most respected M&A operators. In 2016 she bought Topsil of Denmark (float-zone wafer technology) and then SunEdison Semiconductor for $683 million, a company whose lineage goes back to MEMC, the 1959 American pioneer of the silicon wafer itself. Hsu paid a 78.6% premium, was told she overpaid, and turned the loss-making business to monthly profitability within four months. The deal delivered SOI technology, Korean and European customers, and sites across the US and Italy, catapulting the company from number six to number three. Today: 15-plus sites across roughly 10 countries.

The technology. The broadest product portfolio in the industry: polished, epitaxial, annealed, diffused, SOI and float-zone wafers, plus compound semiconductors, with fully utilized GaN lines and 300mm SiC in R&D. Not the deepest at the leading edge, but the widest, which is exactly what a multi-region, multi-application customer base needs.

The operations as strategy. GlobalWafers is, per its own July 2026 release, the only silicon wafer supplier in the CHIPS for America program capable of producing advanced 300mm wafers locally in the United States, with 18 manufacturing and operational sites across nine countries and three continents. First wafers shipped from Sherman, Texas in Q1 2025, expanding toward 1.2 million wafers per year by 2027 under a program lifted to $7.5 billion. Add a 300mm SOI fab in Missouri for defense and aerospace, and a 300mm plant inaugurated in Novara, Italy in October 2025, backed by a €103 million EU and Italian grant.

The Micron alliance: the deal that changes the thesis. On July 9, 2026, Micron, the American memory giant, announced up to $3 billion to strengthen the US semiconductor supply chain, with $500 million in strategic financing for GlobalWafers’ Sherman facility and a 10-year long-term supply agreement. Doris Hsu has since called it the largest long-term deal in her company’s history, and said a second Sherman phase is now necessary. Micron’s own framing, via its chief procurement officer: securing reliable critical materials is essential to its long-term growth and technology roadmap.

Now connect the dots the market has not. Micron’s stock is up roughly 250% in 2026. It crossed $1 trillion in market capitalization in May, riding the AI memory supercycle, and it just raised its US spending plan to $250 billion through 2035 with a target of producing 40% of its DRAM on American soil. As Tom’s Hardware put it bluntly: Sherman is the only US source of advanced 300mm wafers, and Micron’s fabs cannot run without them. GlobalWafers is the engine inside the Micron story. Every DRAM bit Micron sells begins on a GlobalWafers disc; a $1 trillion memory champion has just financed, contracted and politically anchored its irreplaceable substrate supplier for a decade. The market has re-rated the machine and not yet the engine. If Micron’s trajectory holds, its wafer engine follows the same direction, with a lag that is the opportunity.

Wedbush, via TheStreet, reads the deal the same way: a routine-looking financing line that is in fact an early signal of an AI memory shortage nobody has priced yet, brewing for 2028 and beyond. The wafer deal nobody is watching, attached to the stock everybody is watching.

The American backing as pillar of the thesis. This is not one customer’s bet. It is US industrial policy converging on a single supplier: CHIPS grants (about $200 million already received), the AMIC tax credit, public endorsements from Texas senators and congressmen celebrating the Sherman expansion, and now the largest US memory maker as financier and decade-long anchor tenant. Micron is simultaneously locking in its own downstream with strategic customer agreements, General Motors on July 1, Ford on July 6, two of sixteen such deals, which cascades demand security up the chain to Sherman. In a world of supply chain realignment, GlobalWafers holds the one asset that cannot be replicated quickly on American soil, and Washington knows it.

The financials. Q1 2026: NT$14 billion in sales and NT$1.9 billion in net profit, with 300mm and GaN lines fully utilized. The only one of the three earning solid money through the trough, because geographic scarcity already lets it charge for security of supply.

Why it may be the best opportunity of the three. Weigh the setup. Unlike SUMCO, it is profitable today. Unlike Shin-Etsu, it is a pure wafer play whose re-rating is not diluted by PVC. And unlike both, it holds a structural advantage neither Japanese leader can buy at any price: the only advanced US capacity, in the decade when American localization is the industry’s organizing principle, with its expansion co-financed by its own trillion-dollar customer and two governments. Profitable now, customer-funded growth, policy tailwind, and a direct proxy on the strongest memory cycle in history. For an investor ranking the three on risk-adjusted upside over the next five years, GlobalWafers may well come first. The distinct risks remain real: US operating costs, execution across three continents, dependence on the memory cycle it is now chained to, and the honest question of how much of the Micron news is already in the Taiwanese tape.

And the challengers, as speculation, not investment

Eswin (STAR IPO pending) and NSIG (SSE STAR: 688126) are volume stories with negative unit economics, existing to serve a national objective. They are calls on Chinese industrial policy, not on wafer economics. Their success would hurt Siltronic and legacy books long before it dents prime-wafer pricing. Watch them as risk indicators. Own them only as speculation, sized accordingly.

Toll-Booth Economics: An Annuity Filed Under PVC, an Option Priced at Zero

Let’s slow down here, because this section is the investment case.

The annuity layer

A wafer leader’s revenue behaves like a toll booth on a highway that only gets busier. Three mechanisms create the annuity.

Long-term agreements. The majority of leading-edge volume moves under multi-year LTAs signed by chipmakers who cannot risk interruption. This is why reported wafer prices barely moved through the 2023-2025 downturn even as spot prices sagged: the contract book absorbed the cycle. The next LTA vintage will be negotiated into an AI shortage, with the leader already telling investors that cost inflation will be passed through and that customers are asking for new agreements.

Switching costs. Requalifying a wafer supplier at a leading-edge fab takes quarters to years of engineering validation. Once a supplier is designed in, it stays designed in. These are customers who almost never leave.

Consumable economics. A wafer is consumed by every chip, forever. Unlike equipment, bought once per capacity wave, the substrate is a per-unit royalty on global semiconductor output. As long as the world makes more chips, the toll booth collects more.

The margin ladder proves the moat

The gross margin hierarchy maps exactly onto qualification difficulty:

• Commodity 300mm polished wafers: around 10%.

• Legacy 200mm niches (looser flatness, but demanding epitaxy): 12 to 18%.

• SUMCO’s advanced-heavy book: about 24%.

• Shin-Etsu’s almost purely leading-edge franchise: about 28%.

Same product category, nearly three times the margin at the top. That spread is not branding. It is physics, plus thirty years of process learning, plus certification, priced. It is also why Chinese entrants selling at $40 attack the bottom of the ladder and cannot yet climb it.

The flywheel

AI tightens wafer specs at every node. Tighter specs mean only incumbents qualify. Qualification concentration means pricing power at LTA renewal. Pricing power funds the next generation of ultra-flat capacity, like the leader’s fresh billion-dollar 2nm-grade expansion, which challengers cannot match at prime grade because they are burning cash at mature grade. The loop compounds. And now the customers themselves, memory makers and governments, inject capital into the system, strengthening the very suppliers they depend on.

The valuation disconnect

Hold the two sides of the ledger together.

On one side: the companies that consume wafers trade at 30 to 50 times earnings on the AI narrative. Micron alone is up roughly 250% in 2026 and past $1 trillion in market capitalization.

On the other, three producers the market has left behind:

The pure-play number two trades at a loss-making cyclical’s valuation, anchored to book value, at the exact moment its business mix is being surgically converted to the highest-margin product in its history.

The number one trades on diversified-chemicals multiples, meaning the market values it as if the wafer division were just another materials line, when it is in fact a 28%-gross-margin, half-the-world’s-supply strategic asset with pricing power about to reset.

And the number three, GlobalWafers, is the sharpest disconnect of all. It is the engine inside the very story the market has re-rated: Micron cannot make a single DRAM bit without the discs coming out of Sherman, Texas, the only source of advanced 300mm wafers on US soil. Micron’s stock has tripled and crossed a trillion dollars; its irreplaceable substrate supplier, which it has just financed with $500 million and locked in for a decade, has not been re-rated in anything like the same proportion. The market has priced the machine and left the engine on the shelf. If the machine keeps running, the engine cannot stay cheap forever.

At these levels, the AI option embedded in all three is priced at approximately zero. The market is charging you nothing for it. I would rather own the misfiled asset than the correctly filed lottery ticket, and I would rather own the engine than pay a trillion dollars for the machine.

The Repricing Window: 2026 Guidance, 2027 Ramps, 2030 Shortage

Short term, 2026. For the first time since the downcycle began, all three majors raised guidance in the same quarter: 300mm shipment forecasts up about 12% at SUMCO in January, up about 15% at Shin-Etsu in February, epitaxial guidance up about 20% at GlobalWafers in March. Q1 industry shipments grew 13.1%. Then July delivered the template event: Micron's $500 million financing and 10-year LTA with GlobalWafers, the largest long-term deal in the Taiwanese company's history, immediately followed by talk of a second Sherman phase. Expect the pattern to spread: when one trillion-dollar customer pre-pays its substrate supplier, the others cannot afford not to. And beneath the AI headlines, the multi-sector base keeps compounding: automotive electrification, consumer electronics, 5G and industrial demand grow the broader wafer market toward $41 billion by 2035 regardless of any single cycle.

Medium term, 2027-2028. The fab ramp Shin-Etsu describes as unprecedented in recent years arrives exactly as SUMCO's depreciation peak passes and its 200mm exit completes. That crossing is the classic bottoming-out reversal with maximum operating leverage. For GlobalWafers, the second Sherman phase Doris Hsu has already flagged as necessary comes online into the same window, with Micron's decade-long demand contracted in advance and American subsidies underwriting the capex: growth that is largely de-risked before the first wafer ships. Sector consolidation, the SK Siltron sale, a possible Siltronic revisit, would re-rate everyone's scarcity value.

Long term, 2029-2030. The SK chairman's arithmetic: if wafer capacity takes four to five years to add and HBM stays short through 2030, prime-wafer pricing power extends across the entire next GPU era. GlobalWafers rides this twice over: once through the shortage itself, and once through the structural premium that US-made critical materials will command as long as American localization remains national policy.

Scenarios

• Conservative: the recovery stalls, SUMCO grinds back to mid-single-digit net margins, Shin-Etsu compounds regardless, and GlobalWafers still earns through the trough on its contracted, subsidy-backed US book.

• Base: AI capex holds, SUMCO re-earns historical mid-cycle economics on a leaner, 300mm-pure base, and GlobalWafers re-rates as the market finally prices the Micron engine.

• Accelerated: the wafer shortage becomes the acknowledged constraint of the AI buildout, LTAs reprice toward spot, the sector is filed under critical infrastructure, and the only advanced US producer becomes a strategic national asset priced accordingly.

The asymmetry favours the owner: trough valuations, an annuity floor, and an AI option on top. Bought for the annuity, held for the option.

What Could Break the Fortress: China’s $40 Wafer and Other Honest Fears

Be honest about the bear case.

Cyclicality is real. SUMCO’s losses are not cosmetic, and a macro relapse delays the reversal by quarters or years.

China is real. Below-cost pricing has already broken the mature-wafer market inside China. Bernstein’s analyst warns of a survival battle when legacy LTAs expire, and UMC demanding 15% supplier price cuts for 2026 shows deflation leaking into the customer base. The second tier, Siltronic, SK Siltron, Soitec, and any legacy 200mm exposure, absorbs this first. One more reason SUMCO’s 200mm exit is strategically correct.

Bottleneck reversal risk. If Chinese prime-grade qualification arrives faster than experts expect, and SEMI’s own analyst says catching up is only a matter of time, the fortress shrinks to leading-edge-only. Watch the Samsung and SK Hynix evaluations of Eswin as the canary.

Execution and concentration. Earthquake exposure in Japan. For GlobalWafers, a genuinely different profile: building and running advanced 300mm capacity across three continents is operationally hard, US labor and energy cost more than Asian equivalents, and the whole American thesis leans on subsidies and political continuity that a change in administration could dilute.

Customer-concentration risk, the flip side of the Micron engine. The same deal that makes GlobalWafers compelling also chains it to one memory cycle. If AI and cloud capex decelerate and DRAM pricing rolls over faster than Micron can absorb, the 10-year agreement could be slowed or trimmed, and the engine slows with the machine. The upside and the risk share the same wire. And the honest question stands: after a Micron announcement that made headlines, how much of GlobalWafers’ re-rating is already in the Taiwanese tape?

And the check that defines this newsletter: méconnu is not the same as sous-valorisé. Shin-Etsu is a well-owned Japanese blue chip. The company is known. The choke point inside it is what remains unpriced. SUMCO is the truer contrarian bet precisely because its known bear case is fully in the tape. GlobalWafers sits between the two: the Micron news is public, but the market still files it as a Taiwan hardware name rather than as the sole domestic engine of America’s memory champion. The label has not caught up to the position.

The Invoice That Will Finally Wake the Market

Weigh it all. Against the frictions, cyclicality, Chinese capacity warfare, a possible slow grind, stands a structure the market rarely offers: a certified duopoly over the physical substrate of the entire AI economy, at trough earnings, with customers publicly warning of shortages to 2030 and financing supplier capacity out of their own pockets. The misclassification is not “obscure company nobody has found.” It is critical infrastructure filed under the wrong heading.

Why these companies deserve a place in a portfolio

Let me be explicit about the portfolio logic, because it is the part most analyses skip.

They give you AI exposure without AI multiples. Most portfolios today carry their AI thesis through the same handful of mega-caps at demanding valuations. The wafer names deliver a claim on the same physical demand, since every GPU and every HBM stack must consume their product, at materials-sector prices. That is diversification of valuation risk without diversification away from the theme.

They diversify the failure modes. If AI monetization disappoints, model-layer and GPU valuations are exposed, but wafer demand still grows with total semiconductor output: Precedence Research sees the broader wafer market compounding from $23.8 billion to $41.3 billion by 2035 on automotive electrification, consumer electronics, 5G, healthcare and industrial demand, with automotive as the fastest-growing segment. If AI succeeds, wafers are the gating input with resetting prices. The position wins asymmetrically across scenarios: heads, the multi-sector annuity; tails, the AI option.

They add what a European portfolio structurally lacks. Yen-denominated hard assets, the tailwind of Japanese governance reform (a ¥500 billion buyback is not an accident, it is the new Tokyo), Taiwanese exposure to American reindustrialization, and upstream Asian industrial positioning that no European index provides.

The barbell fits different risk budgets.

• Shin-Etsu as the core. Fortress balance sheet, 18% net margin at the trough, sleep-well sizing. Suitable as a long-term compounder for the defensive sleeve of a portfolio.

• SUMCO as the satellite. Smaller, volatile, my purest listed wafer play. Sized so that a two-year delay hurts but does not wound, and held for the torque when the cycle and the depreciation peak cross.

• GlobalWafers as, possibly, the best risk-adjusted opportunity of the three. It combines what the other two must choose between: profitable today like Shin-Etsu, a pure wafer play like SUMCO, and alone in holding the American card. The Micron logic is the cleanest expression of the thesis in this entire article: a customer up 250% this year, past $1 trillion in value, has just financed and contracted for a decade the one supplier its US fabs cannot run without. The engine has not yet re-rated like the machine. Investors who want a single name rather than the barbell should study this one first, while sizing for its memory-cycle dependence.

• The Chinese names stay on the watchlist. Indicators, not holdings.

Conviction, horizon, size. High conviction on the structure, moderate conviction on the timing. Three to five years minimum: this is a thesis about capacity mathematics, not next quarter. In aggregate, a mid-single-digit percentage of a diversified portfolio across the barbell is defensible for an investor who accepts cyclical drawdowns. Concentration beyond that is a statement about risk appetite, not about analysis. Skin in the game: I am building the barbell in my own portfolio on this schedule, averaging through the trough, and I will report the position honestly, in both directions.

What makes the market finally look here? The same thing that always does: an invoice. The first AI-era LTA renegotiation cycle, landing into a shortage the industry’s own customers have already announced. When the re-rating comes, it will look obvious in hindsight. They always do. Until then, the wafer remains what it has been for seventy years: the disc everything is built on, and the last thing anyone prices.

If you’ve made it this far, thank you for spending your time with us <3.

Every three days, Asia Next uncovers another overlooked Asian champion powering the world’s most important technology trends. We go beyond the headlines to identify the companies solving the critical bottlenecks behind AI, semiconductors, robotics, energy, and the next generation of industrial innovation.

Our goal is simple: help you discover exceptional businesses before they become obvious to the market.

If you enjoy this work and would like to support independent, in-depth research, the best way to do so is by subscribing.

See you in the next edition of X-RAY.

Sources: SEMI Silicon Manufacturers Group; TD Cowen via Semiecosystem (Mark LaPedus, July 2026); Nikkei Asia via KrASIA (October 2025); The Korea Herald (May 2026); DigiTimes (June 2026); Tianxia Gongchang Research (2026); Precedence Research, Semiconductor Wafer Market 2026-2035; GlobalWafers press release via North Texas e-News (July 9, 2026); Micron press release and CNBC, Tom’s Hardware, TheStreet/Wedbush coverage (July 2026); Fortune Business Insights; Focus Taiwan and CommonWealth Magazine on GlobalWafers; company disclosures (Shin-Etsu, SUMCO, GlobalWafers, Eswin prospectus); ; Goldman Sachs and Bernstein estimates as reported.

Disclaimer: This publication is independent analysis for informational purposes only. It is not investment advice nor a personalized recommendation within the meaning of AMF regulations. Past performance is no guarantee of future results. The author may hold positions in securities mentioned. Do your own research.

Right now, Asia-Pacific accounts for roughly 60% of global semiconductor revenue. Even more striking: Taiwan alone produces close to 92% of the world’s advanced semiconductor manufacturing capacity (below 10 nanometers), the chips running AI, data centers, and pretty much every breakthrough technology of the next decade.

Here’s what that means for you, in plain terms: there’s almost no major tech innovation on the planet that doesn’t depend, somewhere in its production chain, on an Asian company. Whether you’re invested in American AI, European electric cars, or smartphones anywhere in the world, you’re already exposed to Asia whether you realize it or not.

And yet, most Western investors keep their eyes locked on the usual US giants such as Nvidia, Microsoft, Apple while the real foundations of this tech revolution ( manufacturing, critical components, strategic materials) sit thousands of miles away, carried by Asian companies most people have never heard of, often undervalued, and rarely covered in depth by financial media.

Look under the hood of almost any major tech company on earth and you’ll find the same pattern: the majority of their supply chain suppliers are based in Asia. The foundries, the memory makers, the equipment providers, the materials specialists — strip away the branding and the region doing the actual heavy lifting is Asia, not Silicon Valley. This isn’t a coincidence. Asia is simply the continent innovating the fastest right now, and the companies driving that innovation are the ones I want you watching before the rest of the market catches on.

That’s why this newsletter won’t treat “Asian tech” as one blob. We’re going to go country by country, because each of the region’s tech powerhouses plays a different role and moves for different reasons. Expect deep coverage of:

• Taiwan — the epicenter of advanced chip manufacturing

• South Korea — the memory and display powerhouse

• China — the scale player across e-commerce, EVs, and AI

• Japan — the quiet giant in equipment, materials, and precision components

• India — the fast-rising force in IT services and emerging tech manufacturing

• Southeast Asia (Singapore, Vietnam, Malaysia) — the region’s rising hub for e-commerce, fintech, and backend semiconductor assembly

• Middle East — the capital powerhouse turning oil wealth into sovereign AI infrastructure, deeptech (Israel) and defense innovation (Turkey)

• Australia — the critical-minerals gatekeeper of Asia’s supply chains, with world-class niches in quantum, medtech and defense

That’s exactly the gap I’m here to fill.

My angle: what you won’t find anywhere else

I’m not here to repeat what you already read about the household names. My goal is twofold:

1. Find the undervalued, overlooked stocks with real growth potential — hidden world leaders holding a quasi-monopoly on a vital bottleneck of the tech supply chain, companies with unique, world-first technologies no competitor can replicate, and businesses playing a strategic role in their value chain without making headlines, but whose position could become central in the years ahead.

2. Map out, country by country, who's winning today and who could win tomorrow — the current market leaders, and the challengers quietly climbing the ranks. We decode each nation's technological specialties and the deep currents reshaping them, then translate that landscape into investment opportunities: the misunderstood champions and the listed companies of tomorrow, before the market catches on.

I believe a lot of the real value sits in what the market hasn’t priced in yet, not in what’s already on everyone’s lips.

How this newsletter works: 3 series, 3 angles

To keep things focused and stop you from drowning in scattered news, every issue falls into one of three recurring series.

🔍 “X-Ray” — Country/sector analysis (weekly)

Every week, I zoom in on one specific country and one specific tech sector. No vague “Asian tech” talk, just concrete, grounded analysis.

Here’s what you’ll get in every X-Ray issue:

• A map of the sector in that country — who’s in the game, how big they are, how they’re positioned

• The current leader — who dominates this segment today, why, and since when

• The challengers worth watching — the lesser-known, often undervalued companies gaining market share or positioning for the next breakthrough

• The key numbers — growth, margins, competitive position, so the analysis is grounded in facts, not vibes

• What could shift the balance — a patent, a production capacity, a partnership that could flip the pecking order

⚡ “Shockwave” — News and its impact on the market (weekly)

Also weekly, I take a piece of current news (economic, geopolitical, regulatory) and break down exactly how it hits Asian tech stocks.

Here’s what you’ll get in every Shockwave issue:

• The trigger — what just happened (a policy decision, an export control, a trade tension, a rate decision, a regulatory shift)

• The transmission mechanism — how this actually flows through to the companies and value chains involved (not just “the market is nervous,” but the actual why)

• Who wins, who loses — who benefits, who’s exposed, and why some players are more resilient than others

• Historical context — is this comparable to a past shock, or something new?

• What to watch next — the upcoming dates that could extend or reverse the trend

🧬 “Anatomy of a Chain” — Supply chain deep dive (monthly)

Once a month, I slow down and do the heavier lift: dissecting an entire tech supply chain, from raw material to finished product.

Here’s what you’ll get in every Anatomy of a Chain issue:

• The full map of the chain — every step, from raw component to final assembly

• The players at each link — with their country, their role, their competitive position

• The breaking point — the weakest link in the chain (bottleneck, near-monopoly, critical geographic dependency)

• The hidden winners — the niche suppliers, often upstream, that most people have never heard of but that are essential — and sometimes cheap

• The geopolitical risk attached — because a concentrated supply chain is also a vulnerable one when trade tensions flare up

• The publicly traded names you can actually access — a summary table of relevant tickers at every stage of the chain

What you won’t find here

This is an analysis and information tool, not investment advice. My job is to hand you a clear, factual, structured understanding of a complex and under-covered ecosystem. What you do with it, your own research, your own decisions, with a financial advisor if needed is entirely up to you.

Welcome aboard.