1. Model Technology Progress and Portfolio Strategy

Core technical approach: Scaling remains the key path to higher intelligence, but the objective is not raw parameter count alone. Rather, gains are achieved through the combined optimization of four factors: base model scale, effective depth, training depth, and task environment. Post-training currently offers the highest marginal returns of any optimization lever.

Model iteration cadence: The GLM family has gone through six iterations in roughly 11 months, with the intelligence index rising from 32 to 60 while flagship per-task cost has held steady at the ~$0.20 tier.

Current product line:

- GLM 5 series: Uses coding as the entry point to long-horizon intelligence. Capabilities extend from code generation to system comprehension, task planning, tool invocation, and engineering interaction—moving the model from web coding toward agentic engineering. Programming is now the company's primary revenue driver.

- GLM 5.2: The flagship for long-horizon tasks. Supports a usable 1M-token context window, can carry project-scale engineering context, and completes the full development chain from requirements to deployable multi-platform artifacts.

- GLM 5.3: The latest flagship. Shares the same architecture, total parameters, and activated parameters as 5.2—every gain comes from post-training. End-to-end completion rates on complex programming and long-horizon tasks improved by more than 50%. Training tasks were upgraded from conventional coding problems to complete professional work units that closely mirror expert workflows.

- GLM 5.3 Flash: Built for high-frequency, low-cost inference on a brand-new architecture—320B total parameters, 18B activated, with hybrid sparse and linear attention. Per-task cost as low as $0.045, one-tenth the price of GLM-4.2, while outperforming it. Topped the Arena leaderboard on day one; processed over 62 trillion tokens in its first six days, lifting platform-wide call volume by more than 20%.

Next-generation roadmap:

- Direction: larger effective scale, longer native context, and unified native multimodal modeling. Training of the next-generation base model has already begun.

- Key breakthrough target: full self-training—the model autonomously executing the entire pre-training, mid-training, and post-training pipeline, forming recursive self-improvement capability. Ethical and societal governance considerations are being built into model design.

- Usability commitment: the next flagship will be production-ready for large-scale deployment on day one. The company will not ship models that are big but impractical.

2. H1 2026 Financial and Operating Performance

- Total revenue: RMB 954 million (~US$142 million), up nearly 400% year over year.

- Revenue mix: Open platform and API revenue reached RMB 825 million (~US$123 million), up more than 27x year over year, rising from 15.2% of total revenue in H1 2025 and 26.3% at end-2025 to 86.5%—now the core revenue pillar.

- ARR: As of end-August 2026, ARR on a monthly-revenue annualized basis stands at US$1.6 billion; on an aggressive weekly-revenue annualized basis, it exceeds US$2.0 billion.

- Volume and pricing:

- MaaS platform token volume up more than 40x since the start of the year (Coding Plan volume up more than 23x), as of August 2026.

- Average API pricing up approximately 101%—revenue growth is driven by model capability, not price wars.

- Profitability and R&D:

- Open platform and API gross margin improved from -0.4% in H1 2025 to 24.6% in H1 2026—a 25-point year-over-year improvement and 6 points above the 18.9% recorded at end-2025.

- R&D expenditure: RMB 2.13 billion (~US$317 million).

- Net loss of RMB 2.072 billion, narrowed 12.1% year over year; loss rate improved 4.7x. Adjusted net loss of RMB 1.964 billion, with the adjusted loss rate improving 3.5x. Adjusted net loss is now smaller than R&D spend—gross profit now covers sales and administrative costs and has begun funding R&D.

3. Commercialization and Business Deployment

Three-stage business evolution:

1. Pre-2025: Primarily on-premise model deployments, serving customer needs for tool integration and data compliance.

2. From early 2025: The coding era—models shifted from knowledge-driven to task-driven; API and subscription-based Coding Plan products grew rapidly while the on-premise licensing business was strategically wound down.

3. From 2026: The agentic and co-work era—business shifts from model calls to task delivery, extending into high-value scenarios such as software engineering, cybersecurity, data analytics, and complex automation.

Scenario progress:

- Cybersecurity (most advanced): 84.5% on CyberSecEval—outperforming vivo and GPT-5.6; completed 130 tasks on ExploitDev, second only to vivo and GPT-5.6. To date, 2,436 expert-verified, deduplicated vulnerabilities have been discovered in real-world codebases, more than 1,000 of them high-severity, spanning 269 projects.

- Legal, financial services, and education remain early-stage without material revenue.

MaaS platform metrics (as of August 2026):

- Registered users: over 7.4 million, up 144% since the start of the year, including 1.6 million added between end-June and end-August.

- Paid DAU up 603% since the start of the year; average daily call volume of the top-ten users up 98x.

- High-value customer cohorts (ARR basis): 115 users above $100K, 25 above $500K, 37 above $1M, 8 above $10M, 2 above $25M, and 2 above $250M.

International expansion:

- In 2025, outbound business centered on sovereign-model on-premise deployments, including the publicly disclosed Malaysia sovereign model project.

- The open platform and API business is now the core of the international strategy, with GLM 5.3 and 5.3 Flash positioned to capture the premium-intelligence and cost-effective mass-market niches respectively. Partnerships with overseas CSP platforms are in active discussion; the company plans to expand internationally through open-source models, local hosting, and revenue-sharing arrangements, with concrete announcements expected within one to two months.

4. Compute and Infrastructure

- Domestic chip adoption: Achieved large-scale, low-cost inference on 100,000-card-class domestic chip clusters. GLM-5.3 Flash is the company's first model served entirely on domestic chip clusters under real-world, massive traffic—withstanding a record 62 trillion tokens over six days.

- Inference stack: The proprietary inference engine, built on the 4.3-driven infra engine, dramatically accelerates operators and halved development cycles. Through prefill-decode separation, quantization, layer splitting, and cache/communication optimization, end-to-end serving performance on identical domestic hardware improved 3x over baseline; per-token inference cost fell 80% from the start of the year.

- Compute efficiency: The compute multiplier (open platform and API revenue per RMB 1 of compute input) improved 14x year over year in H1 2026. Intelligence breakthroughs are now generating commercial returns that feed back into compute and R&D—the growth flywheel is beginning to turn.

- Compute priorities: Training windows for the next-generation base model take precedence; the company will not divert all resources to inference despite surging inference-side demand.

5. Competitive Moat and Long-Term Strategy

Five-stage capability evolution: Chat → Coding → Agent → Co-work → Autonomous AI. The company currently sits between stage two (coding) and stage four (co-work). Each step up carries a hard technical threshold that must be cleared before the corresponding business model becomes viable:

- Chat → Coding: verifiable outcomes

- Coding → Agent: long-horizon planning and error recovery

- Agent → Co-work: reliability high enough that professionals review rather than redo the output

- Co-work → Autonomous AI: the model's ability to judge the correctness of its own results

Moat construction: The company does not chase single-benchmark SOTA; it builds a continuously iterating capability system, opening four gaps versus competitors:

1. Faster model iteration speed

2. Higher completion rates on real long-horizon tasks

3. Lower unit cost of intelligence

4. Deeper embedding in customer workflows, creating switching costs

Pricing philosophy: Prices for commodity-level intelligence will keep falling, but frontier models that open new task boundaries and materially raise task success rates command a premium—with room to raise prices further. Willingness to pay is determined by the value of completed tasks, not by token unit price.

Part II: Q&A

Q: How long do you expect your lead in coding to last, and what are the key variables that could change the picture?

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1. Financial Performance: A Step-Change in Profitability

CXMT reported a stellar 1H26, with revenue reaching RMB 150.3 billion (+874% YoY) and net profit attributable to shareholders hitting RMB 77.6 billion. The second quarter alone marked a significant acceleration:

· 2Q26 Revenue: RMB 99.5 billion (+96% QoQ, +977% YoY).

· 2Q26 Attributable Net Profit: RMB 52.8 billion (+113% QoQ), substantially exceeding the market's optimistic expectations of around RMB 50 billion.

· Profitability: Gross margin expanded to 87.6% in Q2 (+8pct QoQ), with a net margin of 74.9% (+10pct QoQ). This surge reflects the strong operating leverage from rising ASPs and the growing contribution from high-value server DDR5 products.

Key Takeaway: Profitability has outpaced even the most bullish IPO forecasts, with actual 1H26 net profit coming in ~36% above the upper bound of pre-IPO projections. The company is no longer in a pure capacity-building phase but has entered a cycle of high-margin growth.

2. Product & Technology Upgrade: LPDDR6 Enters Mass Production

On August 29, CXMT officially announced the mass production of its LPDDR6 memory chips, with the first commercial deployment expected in the upcoming Xiaomi 18 Fold.

· Product Portfolio Evolution: The company has successfully moved beyond legacy DDR4/LPDDR4X substitution. It is now ramping up DDR5, LPDDR5/5X, and LPDDR6, while expanding into server-grade DRAM.

· Technology Roadmap: The 4th-generation工艺 platform is in mass production, with the 5th-generation platform undergoing customer qualification.

This marks a significant milestone—Chinese DRAM players are now competing globally in both high-end specification development and commercial timelines, narrowing the technology gap with industry leaders.

3. Supply-Demand Dynamics: Shortage to Persist into 2H26

Management expects the global DRAM supply shortage to continue through 2H26.

· AI-Driven Demand: The proliferation of AI servers and HBM is consuming a significant portion of wafer capacity, keeping tight constraints on traditional DRAM supply.

· Pricing Support: With supply discipline among major players and sustained demand for DDR5/LPDDR5X, price erosion risk remains low in the near term.

· Customer LTA: The industry is seeing increased adoption of long-term agreements (LTAs), which could help stabilize pricing and reduce traditional cyclical volatility.

4. Capacity Expansion: The Next Growth Engine

With aggressive capital expenditure plans, CXMT is building the capacity to capture a larger global market share.

· Capacity Trajectory: From 180k wpm in 2025, the company is scaling to 300k wpm in 2026, targeting 800k wpm by 2031.

· Financial Firepower: 1H26 operating cash flow reached RMB 131.2 billion, and cash reserves stood at RMB 143.4 billion, providing ample liquidity for continued wafer fabrication expansion.

· Global Share: The company is projected to account for ~13% of global DRAM wafer supply by YE26, up from ~11% bit share.

HBM Outlook: While initial HBM2E production may begin in 2026, we anticipate HBM3E (12-Hi) and HBM4 entry in 2027 and 2028, respectively. This is critical for servicing the growing domestic AI accelerator market.

The filing offers some interesting takeaways

The Most Disruptive Facts for the Global Competitive Landscape

1. Market Position: Already World No. 3

According to TrendForce data, in the first quarter of 2026, YMTC ranked third globally among NAND flash vendors by both revenue and shipment volume—and first in China. It has already overtaken Kioxia, SanDisk, and Micron, and is now breathing down the neck of Samsung and SK Hynix. This poses a direct threat to the market share of the incumbent five giants.

2. Profitability: Catching Up—and Even Outpacing—Global Incumbents in Some Metrics

· Q1 2026 revenue: RMB 47.04 billion; net profit attributable to shareholders: RMB 33.38 billion (a jaw-dropping ~71% net margin in a single quarter).

· Q1 2026 gross margin (NAND flash products): 78.73%

3. Technology: Solidly in the Global First Tier

· One of the world's first to mass-produce 200+-layer 3D NAND (Xtacking® 3.0, 2022).

· Iterated to Xtacking® 4.0 in 2024; twice won the FMS "Most Innovative Memory Technology Award."

· Fifth-generation QLC product, the X4-6080, is the industry's first 2Tb 8-plane QLC, with an I/O speed of 3,600 MT/s.

· Secured a patent cross-licensing agreement with a major international player in 2025.

· Hybrid bonding is the mainstream technological direction for scaling 3D NAND to higher layer counts—and YMTC's Xtacking® architecture, built around hybrid bonding, enjoys a first-mover architectural advantage.

Fundraising Use and Its Potential Industry Impact

The proceeds will be channeled into production line construction, upgrades, and R&D. Over the reporting period, YMTC has cumulatively:

· Spent approximately RMB 15.95 billion on R&D.

· Invested approximately RMB 96.39 billion in cash for long-term asset purchases (with accumulated depreciation and amortization of RMB 50.95 billion).

Key takeaway: The NAND market is currently in a high-cycle phase of supply shortage and robust demand. The prospectus explicitly notes that YMTC's production capacity still lags behind global giants—and that large-scale capacity expansion will continue. With ChangXin Memory Technologies (CXMT) already publicly listed in the DRAM space, both of China's memory heavyweights now have access to capital-market firepower. For Samsung, SK Hynix, and Micron, the calculus becomes: enjoy the pricing upcycle vs. prevent Chinese players from using the cyclical upturn to expand capacity and grab share.

YMTC's 2025 revenue of RMB 63.19 billion has already surpassed SanDisk and is catching up to Kioxia. Its fixed-asset newness ratio is high, and it remains in an expansion phase (fixed assets/revenue hit 528% in 2023 but dropped to 70% in Q1 2026, indicating rapid efficiency gains).

Demand-Side: Why This Window Exists

· Global data volumes: 175 ZB in 2025 → 1,003 ZB by 2030 (IDC).

· NAND flash market size: US400 billion by 2027.

· Enterprise SSDs replacing near-line HDDs is the largest growth driver: enterprise NAND demand projected to exceed 1,325 EB by 2030, with a 2025–2030 CAGR of 36.1%.

· AI-driven trends: rising QLC share, new form factors like high-bandwidth flash (HBF) (SK Hynix and SanDisk samples expected commercial by 2027), and layered integration of NAND with DRAM/HBM. Technology roadmap choices will reshape competitive positioning.

Geopolitics: The Single Most Important Variable

The prospectus repeatedly highlights geopolitical risks—YMTC has previously endured "extremely difficult conditions during the most challenging period of international trade policy" (an apparent reference to the U.S. Entity List), and its overseas market expansion faces asymmetric competitive barriers. This implies:

1. YMTC's current growth is primarily driven by the domestic Chinese market—local suppliers currently cover only about half of domestic consumer-grade demand, leaving substantial room for substitution.

2. incumbent players "prioritize overseas customers with capacity allocation," inadvertently ceding the China market to domestic players.

3. Localization of upstream equipment and materials is accelerating; YMTC serves as a key verification platform for domestic equipment and materials suppliers, and supply-chain self-sufficiency will increasingly dilute the effectiveness of U.S. export controls.

Summary

1. Reshaping of the NAND FLASH landscape is a reality. The global NAND market is moving from a "Big Five" structure toward a new configuration of "Samsung/SK Hynix + YMTC + the rest." YMTC has effectively joined the first tier.

2. Cyclical boom × capital-market boost. Riding the AI-driven super-upcycle (stronger than the previous two cycles), YMTC has achieved explosive profitability and gained access to public markets, addressing its biggest weakness—over-reliance on bank loans for funding (with a debt-to-asset ratio that once hit 61%)

3. Impact pathway for incumbents. In the short term, the entire industry enjoys volume and price growth—a rising tide lifts all boats. In the medium-to-long term, YMTC's capacity expansion, import substitution, and technological edge (Xtacking hybrid bonding) will squeeze the share and pricing power of other players, although，it is still a Local for Local market.

Pricing Trends in Q3 and Q4 2026:

Consumer-side prices have not shown any significant increase. Products such as eMMC and UFS, shipped to smartphone OEMs, remain at approximately $0.28 per GB. Pricing for UFS and eMMC has remained flat quarter-over-quarter. For Tier 1 clients – including TV manufacturers and large consumer electronics players – domestic pricing in China has also held steady with no increases.

SSD prices, however, have risen by roughly 30%. Enterprise-grade demand in China is predominantly concentrated in consumer electronics, with relatively limited enterprise SSD shipments; primary customers include ByteDance, Alibaba, and Tencent.

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Domestic Enterprise-Grade Pricing for Key Chinese Customers:

Pricing for enterprise-grade products supplied to ByteDance and Tencent is broadly in line with mobile segment pricing, though slightly higher by a few percentage points.

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Overseas Cloud Service Providers' SSD Demand and Pricing:

Visibility into overseas market conditions is limited. However, Kioxia has already locked in over 60% of its 2027 production capacity for overseas customers, up from less than 30% previously. Currently, approximately 20%–plus is allocated to consumer applications, with the remainder directed toward automotive-grade products – driven largely by demand from Japanese automotive customers. China's allocation of Kioxia's capacity has now fallen to approximately 10%.

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Overseas Locked-in Capacity and Pricing Mechanisms:

Overseas long-term agreements (LTAs) generally lock in volume, not price – this is consistent across other major NAND manufacturers. Kioxia's capacity is not yet fully tied up under LTAs; negotiations remain ongoing, but the majority of 2027 capacity allocation has effectively been determined. Kioxia's capacity expansion remains conservative, at just over 20% – consistent with the generally prudent approach of Japanese corporations. Kioxia has discontinued production of small-capacity products, including SLC NAND and 64GB eMMC, reallocating capacity toward high-end enterprise SSDs. This shift carries significant implications for China, whose storage market remains predominantly consumer-driven.

China's consumer electronics demand substantially exceeds that of other countries. Outside of Apple, U.S. consumer electronics demand is relatively modest. With robust North American demand and constrained supply, manufacturers prioritize SSD production over consumer-grade NAND. Consumer-grade products are overwhelmingly driven by Chinese demand. If capacity is not allocated to China, consumer-grade prices will remain stagnant, and enterprise-grade pricing will likewise see limited movement. The consumer segment continues to face supply shortages, preventing downward price adjustments. The supply structure is unlikely to shift materially, and the overall outlook remains challenging. The consumer market has reached a supply–demand equilibrium, but it cannot be entirely abandoned. The U.S. region now accounts for approximately 35% of capacity, up from 25%, with the incremental 10% also sourced from consumer allocations. SSDs now comprise approximately 60% of overall production.

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Projected Q3 2026 Enterprise-Grade SSD Price Increases:

Upside potential remains limited, given the already elevated base. A 20%–30% increase is viewed as the upper bound. Consumer-grade pricing is expected to remain largely flat, with at most a modest uptick. Enterprise-grade products still have room for upward movement. DRAM price increases are even more pronounced, as server/data center applications utilize different material sets compared to consumer-grade products.

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Consumer Electronics Seasonality and Its Impact on Consumer NAND Share in H2 2026:

That is unlikely. The consumer electronics landscape should be assessed across three dimensions: (1) spot market conditions, (2) downstream inventory levels – several large Tier 1 customers had already built up a full year's worth of inventory by CQ1 2026, compared to the typical one-quarter buffer, and are therefore not currently procuring – and (3) end-consumer willingness to absorb higher prices, which remains uncertain. The full impact of NAND price increases on consumer demand has yet to materialize. The PC segment is already showing visible effects – previously, a $300–$400 PC was easy to configure; now it is considerably more difficult. The ultimate pass-through to consumer purchasing behavior requires further observation.

Currently, spot market supply is ample, with significant sell-side pressure. Consumer demand remains weak. Handset OEMs pre-built inventories, and given current pricing and inventory levels, both demand and prices face headwinds. Companies cannot simply halt production; business continuity requires material procurement. However, inventories will eventually deplete, at which point replenishment becomes necessary – the key variable remains end-consumer purchasing power. The spot trader environment is even more complex: many participants are not storage industry incumbents but rather speculative players who accumulated positions in prior quarters and are now selling at a loss. This panic-driven sell-off – akin to equity market behavior – exerts downward pressure on spot pricing, rendering spot prices an unreliable benchmark. Many of these traders are non-industry participants who built positions last quarter and are now offloading as prices decline.

China's consumer segment is characterized by a large number of small-to-medium-sized customers – commercial display, tablet, and other OEMs – who do not tend to build inventory speculatively. They continue to purchase, but not directly from original NAND manufacturers. Secondary material flows are particularly robust, with many large companies now utilizing second-hand dies. Given these dynamics, a meaningful recovery in consumer demand is unlikely until existing inventory is fully digested.

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Enterprise-Grade SSD Demand Growth and Its Effect on SSD Pricing:

Enterprise-grade pricing still has room to rise, given the scale of demand. All major NAND manufacturers are seeking to mitigate cyclicality through volume-locked LTAs and pricing stability, rather than aggressive price hikes – margins are already healthy, and stable volume over multiple years is equally attractive. The industry universally aims to escape the boom–bust cycle, as downturns have historically been severe. Manufacturers are making concerted efforts in this direction.

In terms of further upside potential, enterprise-grade prices can continue to rise. Enterprise demand growth is persistent – every new large-model AI deployment doubles storage requirements. The critical unknown is the pace of capacity expansion at YMTC and CXMT. The primary constraint is capacity, not pricing; all customers are vying for volume allocation and are reluctant to negotiate price. Capital expenditure must be recouped – the U.S. tech majors have made massive investments and will inevitably seek returns. The current phase remains one of market share capture. This explains why Kioxia has discontinued its historically core small-capacity product lines, where it was a dominant player in sub-64GB NAND – all production is now being redirected toward enterprise-grade SSDs.

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Timeline for Domestic Chinese Manufacturers to Achieve Breakthroughs in Enterprise-Grade SSDs:

This is unlikely before the end of 2027 at the earliest. 2027 will be an extremely challenging year. Once existing inventory is depleted by 2027, procurement must resume. Large corporations have better risk resilience, but SMEs face greater difficulties. Commercial display manufacturers, for instance, face high bill-of-materials costs – including DRAM, NAND, and SoC main controllers – making it increasingly difficult to sustain operations. Their current viability depends on secondary and spot-market materials, which will inevitably run out. Business continuity demands that someone ultimately absorbs these costs – just as consumers must replace failed smartphones. It is only a matter of time. Those unable to afford the higher costs will be forced out through industry consolidation, while surviving players will continue, albeit under significant margin pressure.

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Domestic Manufacturers' Participation in Enterprise Data Center Products:

Yes, they are supplying, but the controllers are not self-developed – they are co-developed with third-party partners. Enterprise SSD controller capabilities lag behind those of vertically integrated players. Controllers are expensive and represent a significant portion of BOM cost.

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Core Bottleneck: SSD NAND Die vs. Controller SoC:

The controller SoC is a critical component, accounting for a substantial portion of enterprise SSD cost. It is exceptionally important in enterprise-grade applications.

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Enterprise-Grade Pricing Mechanisms for 2027 – Volume Locked but Price Not Fixed:

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Cutting Memory

On the Prefill side, NVIDIA once promoted Rubin CPX (GDDR7 96–128 GB replacing HBM4, cutting costs by 50%+), but quietly shelved that route at GTC 2026. On the main Rubin Ultra track, HBM4 capacity is being trimmed from 288 GB down to 192 GB; CPU SOCAMM drops from 192 GB to 96 GB. KV Cache is being offloaded via BlueField-4/CMX to local SSD/NAND tiers, leaving only hot data in HBM.

Adding Optical Interconnects

At the rack level, the scale-up domain expands from NVL72 to NVL576. Cross-rack links are moving from pluggable optical modules to NPO/CPO. Spectrum-X silicon-photonics CPO switches are entering mass production and delivery in 2026, with power consumption reduced by roughly 70%.

Market Implications

The BOM savings freed up from HBM are being redirected into switch trays and optical engines. This played out on August 3rd: CPO names surged while HBM names weakened, SK Hynix and Samsung each dropping more than 8% — a move directly triggered by the Rubin Ultra downgrade rumors. And today, China's A-share optical module names saw sharp gains.

The Big Picture

NVIDIA is systematically replacing the most expensive per-GPU HBM with stage-appropriate memory tiers(SSD) and optical interconnects. This is exactly what Jensen mentioned at the MS NDR：if memory becomes too expensive or scarce, work around it by adjusting architecture

Taking a step back further — when the most upstream bottleneck becomes a problem, Nvidia will optimize it; when GPU shortages become a problem, the CSPs or Labs（DeepSeek）will optimize it. A bottleneck means pricing power, but it also means countervailing forces will emerge.

Below is details: (2,500 words in total)

How will the company plan to resolve CPU capacity issues to meet the increasing demand for CPU usage in the market? Will you consider introducing capacity from other foundries like Samsung?

The capacity supply issue can be viewed from several perspectives.

• TSMC’s Current Framework: First, within TSMC’s existing capacity framework, although the total volume of wafer tape-outs is relatively fixed—for example, the 3nm monthly capacity is around 170,000 wafers—there is still room to increase output by improving yield rates, which is expected to bring a progressive increment of about 5%.

• Product Portfolio Adjustments: Second, the product portfolio provides room for adjustment. For instance, the 9005 series utilizes both 3nm and 4nm processes simultaneously. In Q1 2026, market demand for 4nm process products was robust. Since there was less competition for this portion of capacity, the company managed to over-produce, boosting the proportion of the channel business by 45% compared to 2025.

TSMC’s own physical expansion cycle is quite long, typically requiring 1–2 years, meaning that any order-of-magnitude changes in its capacity might not materialize until 2027. The trend of CPU utilization catching up with GPUs is clear, but it is a gradual process. It is estimated that by 2027 to 2028, the ratio of CPUs to GPUs could reach 1:2, and potentially approach 1:1 by 2030.

To expand capacity, the company is indeed considering other options. In March 2026, senior management visited Samsung to primarily discuss cooperation in two areas:

1. HBM4 Supply: This aims to supplement HBM resources for products like the MI455X, as HBM supply has become another critical bottleneck following CoWoS packaging capacity.

2. Foundry Possibilities: They explored foundry options for 2nm to 4nm nodes, with a specific focus on 2nm. However, Samsung’s current yields on these advanced nodes are low and do not yet meet the requirements for large-scale mass production.

What is the company’s current standing within TSMC’s advanced process wafer capacity? What is the competitive landscape like across different process nodes?

• 3nm Process: The company ranks behind NVIDIA and Broadcom in TSMC’s capacity allocation. This allocation ratio is quite similar to the landscape seen in CoWoS capacity.

• 2nm Process: For the upcoming 2nm process, set to launch in the second half of 2026, the competitive landscape differs. The company faces priority capacity competition from mobile clients such as Apple, Qualcomm, and MediaTek, placing it fourth in line. Because initial wafer output for the 2nm process will be limited, its introduction will only partially alleviate existing capacity pressures, and product pricing will consequently be higher.

Considering that incremental CPU demand in the AI space may be increasingly captured by the ARM architecture, alongside the company’s own product roadmap, what kind of growth trajectory do you expect for server CPU shipments in 2027?

The growth outlook for 2027 needs to be evaluated in conjunction with structural changes in the market.

First, the x86 architecture still maintains a dominant position in the global server market. According to IDC metrics, the ARM architecture accounted for roughly 12.5% in 2025. With the top four cloud service providers (CSPs) ramping up investment in AI infrastructure, and the introduction of products like NVIDIA’s Grace Hopper and Vera Rubin, ARM’s share is expected to approach 20% by the end of 2026. This trend aligns with the shift in AI workloads from training to inference, with some forecasts predicting that ARM’s market share could reach 40% by 2030.

Despite ARM’s expanding share in the incremental AI market, the x86 architecture still has its designated application scenarios:

• The typical ratio of ARM to GPUs is 1:2.

• Under the x86 architecture, particularly in enterprise AI applications, the CPU-to-GPU ratio is generally no lower than 1:4.

The company will launch Helios and MI-Link 7.2 (similar to NVIDIA’s NVLink) in the second half of 2026 to provide a total solution. In such bundled packages, the ratio of CPUs to GPUs is relatively fixed.

Based on this backdrop, the company remains optimistic about server CPU shipment growth. At the end of 2025, the growth forecast for 2026 was set at 18%, but following the conclusion of Q1 performance, the full-year shipment growth expectation for 2026 has been revised upward to 35%. Looking ahead to 2027, with the addition of TSMC’s new production lines and the potential introduction of Samsung’s capacity, the shipment growth rate will depend heavily on how capacity materializes in Q3 2026. Furthermore, by utilizing flexible packaging strategies—such as packaging a 192-core product into multiple 64-core dies—the company can effectively boost shipment numbers and capture market share.

How did AMD’s server CPU average selling prices (ASPs) change year-over-year in Q1 and Q2 2026? What were the primary drivers?

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1. Supply-Demand Mismatch: Why “Strangulation” Occurs Despite Ample Theoretical Capacity

From a physical standpoint, a 2-inch InP substrate can theoretically yield approximately 5,000 CW (Continuous Wave) laser die or 7,000–8,000 EML (Electro-absorption Modulated Laser) die. Given the 2026 demand for 800G/1.6T optical modules is estimated at 220 million chips, only tens of thousands of substrates should technically be required.

However, the market is currently experiencing an extreme shortage. For 3/4-inch substrates, monthly demand in 2026 is reaching 700k–800k units, while total global monthly supply is only 400k. The core reasons are:

Extremely Low Effective Yield-per-Wafer: Theoretical die counts do not equate to actual shipments. High-end EML chips face rigorous reliability challenges during Wafer Sort (wafer-level certification). Even if performance metrics are met, a wafer is scrapped entirely if it shows instability during high-temperature/high-humidity or extreme current stress tests. Consequently, the average effective yield per substrate can drop to just a few hundred die.

Inventory Depletion and Panic Buying: By Q1 2026, downstream chip manufacturers had exhausted several years of accumulated inventory. Driven by supply chain security concerns, major players have signed framework supply guarantee agreements, locking in existing capacity as reserves and effectively reducing the spot market to zero.

Expansion Cycle Misalignment: The expansion cycle for this supply chain typically takes 18–20 months. Although manufacturers are aggressively expanding, the process from civil construction completion to the stabilization of process tuning (such as EDI water quality and environmental particle control) takes 6 to 10 months. Most new production lines are currently in the commissioning phase and have not yet formed effective supply.

2. Supplier Landscape: Japanese Retreat and the Turning Point for Substitution

The supplier structure for InP substrates is undergoing an irreversible shift:

Evolution of Supplier Structure: Historically, Sumitomo Electric (42%) and JX Nippon Mining & Metals (13%) dominated the market. However, in the past two years, Japanese suppliers have essentially stopped supplying third-party foundries like IQE, prioritizing US-based customers (e.g., Coherent, Lumentum).

The Pivotal Role of AXT. AXT is not restricted by export controls on raw material (high-purity Indium) and possesses significant expansion elasticity.

3. Capacity Bottlenecks: Crystal Growth Furnaces vs. MOCVD Equipment

VGF Crystal Growth Furnaces: The equipment itself is not a bottleneck; domestic assembly cycles are approximately 3 months. The challenge lies in yield and size transition. The current mainstay is 3-inch, with a shift to 4-inch expected by 2027. 6-inch furnace yields remain below 15%; a single furnace (15kg charge) only produces about 50 4-inch blanks, making it economically viable only for high-premium large-size orders.

MOCVD Epitaxial Equipment: This is the “hard” bottleneck of the current supply chain. Delivery cycles for Aixtron or Veeco machines are as long as 10–12 months. Manufacturers are currently forced to modify the carriers of older models (G4/G5) to make them compatible with 4-inch production, effectively increasing output per run.

Post-Processing Challenges: Mechanical processing, CMP (Chemical Mechanical Polishing), and cleaning stages after crystal growth require extremely high EDI water quality and environmental control. These factors are critical variables limiting the time-to-market for new facilities.

4. Key Technology Evolution: How CPO Applications Will Redefine Supply and Demand

The ramp-up of CPO (Co-Packaged Optics) is the single largest variable in the future supply-demand landscape.

Demand Multiplier Effect:High-power CW light sources (300mW/400mW) used in CPO solutions have a significantly larger die area than standard CW sources. While CPO has not yet reached massive shipment volumes, it is expected to take off in 2027, consuming InP substrate capacity at several times the rate per unit.

Structural Divergence:

EML Manufacturers: Experiencing the most acute shortage. Due to low yields and long process cycles, they must reserve several times the substrate volume relative to their final delivery targets.

CW Manufacturers: The technical barrier is lower. Dozens of domestic companies have pivoted from EML to CW laser R&D. While CW resources are relatively ample in the short term, the shortage will spread to all categories as high-power demand increases.

5. Conclusion: Pricing Power and Sustainability

InP substrates account for an extremely low proportion of the total cost of an optical module (approx. 2%). This makes downstream manufacturers highly insensitive to price and more focused on supply guarantee agreements.

Currently, suppliers like AXT have implemented price hikes of nearly 70% for some customers. Due to the irreplaceable physical properties of InP (high electron mobility, efficiency in 1310nm/1550nm wavelength devices) and the high barriers to expansion and certification, this shortage/price hike wave—driven by AI compute demand—is highly sustainable. Substrate manufacturers have evolved from simple material suppliers into strategic resource providers with “stranglehold” leverage.

For further details, see below:

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1. From November 2025 to present, company I has raised CPU prices 3 times in total (2 rounds for consumer-grade, 1 round for server-grade), with each hike around 10%; consumer CPU pricing is flexible while server CPU adjustments follow fixed annual windows, pushing consumer CPU ASP to rise from 150 (2025) toward 170 in 2026.

2. CPU price surges are mainly driven by tight storage supply chain resources, climbing raw material & energy costs, and boosted complementary CPU demand from storage chip stockpiling by clients.

3. Company I server/data center CPU shipments are projected to grow 20% YoY in 2026; the growth matches market demand, and extra AI-driven orders can be fulfilled via supply chain optimization without capacity constraints.

4. Server CPU ASP will keep rising above 1,000 in 2026 even without price hikes (driven by high-end product mix upgrade), and reach 1,200 after 2–3 additional 10% price increases within the year; Company A gains faster data center market share with high-core, AI-integrated E chips.

5. Company I server CPUs act as general-purpose computing cores in heterogeneous AI servers, coexisting with proprietary chips like Google TPU and NVIDIA accelerators; Agent AI growth brings targeted partial CPU order growth for cloud sandbox workloads instead of overall broad demand spikes.

6. 2026 CPU orders are mostly locked; 2027 capacity negotiation has not started, with a maximum 7-quarter order lock period for mainstream clients, and 2027 procurement planning will begin in Q3 2026.

7. Advanced processes (18A/Intel 3/Intel 4) have combined 50,000 monthly wafer capacity; mature process (Intel 7/14nm/22nm) capacity can be partially converted to 18A production with extra costs, while DUV mature lines cannot shift to EUV advanced nodes directly.

8. Packaging technologies are tiered: high-capacity standard packaging (ATM) across Asian sites, capacity-constrained advanced Foveros 3D stacking competing with TSMC CoWoS, and mid-tier EMIB with cost/supply advantages but inherent I/O density limitations as a transitional chiplet solution.

9. IDM 2.0 and IFS foundry business see limited external client breakthroughs; cross-party collaborations focus on chiplet integration & IP licensing (NVIDIA Rubin, Google TPU auxiliary dies) rather than full foundry manufacturing; 14A mass production is delayed, and 18A expansion relies on existing line upgrades without new fab investment.

Below is details:

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Google’s demand guidance for optical chips (CW + EML) is exceptionally aggressive, projected to grow from 200 million units in 2026 to over 1 billion units by 2029.

2. Structural Shortages and the 2027 Critical Gap

The industry anticipates a 10%–20% supply-demand gap in 2027, primarily driven by the 1.6T upgrade cycle. The most significant shortages are expected in 200G EML and high-power CW chips, while the market for 100G EML is predicted to stabilize and reach equilibrium by 2028 as demand for older specifications peaks and begins to decline.

3. PIC Capabilities as a Competitive Differentiator

Technical divergence in 1.6T module design has created a specialized bottleneck for high-power CW lasers. While market leaders like Innolight can utilize 70–80mW sources due to superior Photonic Integrated Circuit (PIC) efficiency, other manufacturers require near-100mW lasers to compensate for higher link loss, making ultra-high-power chips a critical constraint for the broader supply chain.

4. Technical Evolution Toward High-Power CPO Solutions

The transition to 400G per channel is driving the development of next-generation CPO light sources, such as 16-wavelength architectures and 800mW ultra-high-power chips. To support this scaling, the industry is shifting from 4-inch to 6-inch Indium Phosphide (InP) substrates by 2028, with expected chip die sizes increasing by 1.5 to 2 times to handle the intensified power requirements.

Below is the details：

Expert Q&A Session

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Before discussing the CPO testing process, it is first necessary to clarify one point: light and electricity must be separated. When testing light, we only discuss optics; when testing electricity, it is semiconductor-related. The two are completely independent in terms of testing requirements. Although photoelectric conversion is achieved through Photodiode detectors, followed by circuits for signal processing and filtering, these are not the focus of today's discussion.

CPO testing has evolved iteratively from PIC (Photonic Integrated Circuit). After PIC and EIC (Electronic Integrated Circuit) are synthesized into an optical engine and then integrated with an electrical switch or GPU, it becomes CPO. The testing process has also evolved this way: first, optical testing of the PIC is performed, followed by electrical testing of the EIC and the switch. The current industry consensus is that 80% of the parameters and functions of CPO testing are on the electrical side, but 80% of the testing difficulty is on the optical side. The reason is that PIC requires optical coupling; as a passive chip, light must be coupled into the chip, modulated, and output to measure the conversion process of the entire optical path.

PIC testing mainly involves three core functional modules. First, the electrical probe module. On a PIC, there are modulators, detectors (PD), and passive devices (such as waveguides, switches, lenses). Both modulators and detectors require electrical driving; therefore, electrical probes are needed to power them and test the electrical signals of the modulator and the photocurrent/dark current of the PD. Second, the optical coupling module. Since the PIC itself has no light source, light must be coupled into the PIC during testing via an optical probe (usually a single-mode fiber with a tiny optical probe head).

After passing through the internal optical path conversion of the chip, the optical signal is extracted from the output end for detection to determine if it meets design requirements. Third, the test instrument and meter module. All optical and electrical signals require peripheral instruments and meters for collection, analysis, and calculation. These meters obtain signals through optical and electrical probes to complete the test.

In summary, a CPO testing system mainly consists of three parts: the electrical probe module, the optical coupling module, and the test instrument module. The electrical probe module includes semiconductor electrical probes, RF high-frequency probes, and DC probes; the optical coupling module is responsible for coupling optical signals into the chip; the test instrument module is responsible for signal collection and analysis. These three parts together constitute the complete CPO testing workflow.

ATE equipment like Advantest and Teradyne mainly performs electrical testing for EICs and switches, which has nothing to do with optical testing. In PIC optical testing, the electrical probes and the electrical testing portion of the instruments only serve the optical test. A PIC integrated chip contains modulators, detectors, and passive devices. Modulators require electrical driving, necessitating electrical probes for power; detectors (Photodiodes) are responsible for photoelectric conversion and also require electrical driving. Passive devices like waveguides and switches mainly involve optical signals, but the modulated signals need their high-frequency characteristics measured, requiring RF high-frequency probes. Although these probes measure the bandwidth of the optical signal, it is ultimately displayed on an oscilloscope via electrical signals.

Oscilloscopes produced by companies like Keysight can characterize the waveform and bandwidth of optical signals using electrical signals. In short, the electrical testing part of PIC testing all serves the optical test, which is completely different from traditional ATE electrical testing.

To summarize, a PIC test bench contains three modules: the electrical probe module (including RF probes, DC probes, etc.), the optical coupling module (responsible for coupling light into the chip), and the test instrument module (responsible for signal collection, analysis, and calculation). The electrical testing part includes electrical probe stations, RF probe stations, DC probe stations, and AC probe stations.

Major manufacturers include FormFactor, Tokyo Electron (TEL), MPI, etc. These companies can produce test benches and integrate other modules. The second category consists of coupling manufacturers who provide coupling solutions and integrate test and probe modules to form a test bench. For example, ficonTec is mainly responsible for the coupling part, while other modules are integrated through procurement, and software integration may also be required. However, all hardware is purchased; probes are basically bought from FormFactor because semiconductor probes are very mature, so one can buy an off-the-shelf one and assemble it. One can buy from major or small manufacturers, or customize them.

Two typical representatives of probes are FormFactor and Axis-Tec. The third category capable of making test benches are test solution providers, such as Keysight, Viavi, domestic company Link-X (Lianxun), as well as Anritsu and Rohde & Schwarz. There are many instrument manufacturers because their products are relatively standardized, so theoretically, they could also make test benches. However, it must be explained that from a commercial perspective, test solution providers are not very willing to make test systems.

Why? Because they mainly sell instruments, including electrical, optical, and RF meters. If they make their own test benches or systems, they would compete with some of their customers; for instance, they can sell instruments to Tokyo Electron for them to integrate into test benches, but if they make test benches themselves, they enter a competitive relationship with Tokyo Electron.

Therefore, current instrument manufacturers who actually make test benches usually do not do full-machine testing; they only sell meters or full-machine solutions. There are two ready examples: Keysight, the world's largest test solution company, only provides test solutions and sells them to FormFactor—exclusively to this one company—rather than making the equipment itself. FormFactor buys Keysight's test solutions, adds its own probe solutions and coupling modules, and having acquired a company specializing in optical probes, integrates them into a complete testing system. Another example is ficonTec, which cooperates with New Zealand’s Coherent Solutions and Keysight; they buy test solutions and FormFactor's probe solutions (including high-frequency probes), perform the coupling themselves, and organize the entire testing equipment. Close ties have formed in the industry; for example, ficonTec and Coherent Solutions, and FormFactor and Keysight have one-to-one binding relationships, while other collaborations are more loose. This is the general situation.

It sounds like there are currently two main factions: one led by probe manufacturers like FormFactor who combine these three modules into a solution, and those who excel at optical coupling, like ficonTec. How do you evaluate the respective advantages of these two models?

The core competencies of these two models are their advantages. FormFactor's advantage lies in its very strong probe technology, especially electrical probes, while being tied to Keysight, the world's largest test solution provider, forming a powerful alliance. Currently, their only shortcoming is the coupling module. FormFactor already has mature electrical probes and test solutions, but its coupling is not yet mature enough. To solve this, FormFactor specifically acquired Keystone, a company that makes optical probe heads using polymer printing for micro-lenses, which had previously collaborated with ficonTec. FormFactor’s strength is having mature probe solutions (including RF and standard electrical probes) bound with Keysight’s test solutions; the weakness is coupling. Previously a semiconductor company, FormFactor had no experience in optics, so it acquired the optical probe company and developed software to bridge this gap.

ficonTec’s advantage is related to its history. Since 2010, ficonTec has collaborated with top-tier companies like Finisar, JDSU, Cisco, and Intel, accumulating nearly 20 years of coupling experience and process capability, making them the strongest in coupling. ficonTec is also skilled at integration, able to integrate solutions from FormFactor and Coherent Solutions, and possesses a flexible software suite called PCM (Process Control Master), showing strong integration capabilities. The weakness is less experience in electrical testing, being a newcomer to the semiconductor field. However, since the most difficult part of current PIC testing and future CPO testing is optics, ficonTec still has an opportunity. That said, TSMC prefers to work with semiconductor companies like Teradyne and FormFactor because of their long-term cooperation and smooth communication. TSMC is not familiar with optics; working with ficonTec might present communication barriers, so they prefer semiconductor manufacturers to integrate optical coupling modules into a complete system. This is the general trend in the industry. Taiwan's OSATs (Outsourced Semiconductor Assembly and Test), such as ASE, currently still use companies like Advantest and Teradyne for testing. Teradyne's core competency lies in switch and GPU testing; ESA is just a secondary test, and while they need to test the ESA in the optical engine, the core remains the switch and GPU. TSMC is willing to cooperate with them because of their advantages in these areas. Last year (2025), Teradyne specifically acquired a New Zealand optical testing company to fill its optical testing gap, providing RF and various optical signal tests. Teradyne focuses on electrical testing, supplements its optical testing capability through acquisition, and then integrates the probe station and coupling solutions to achieve integrated optoelectronic testing. They have now opened up a full set of testing solutions from PIC and optical engines to switches.

FormFactor announced the Triton project, collaborating with Advantest to deliver a complete testing solution. Is FormFactor responsible for the PIC optical test bench while Advantest uses its own V93000 platform, or does Advantest directly integrate FormFactor's parts into its own testing platform?

Advantest itself handles the wafer probe part of switch testing; for the power-up part, they likely buy boards from FormFactor. Although I haven't investigated in detail, it is certain that Advantest does not make probe stations; they only integrate products from other probe manufacturers, most likely buying from FormFactor. FormFactor can provide probe stations for both electrical and optical chips. Therefore, the core competency of Advantest's CPO testing solution lies in the test instruments and combined software, while the probe station—including electrical and optical probes—is purchased from FormFactor, and the coupling solution (mainly software) is then integrated. With these three capabilities, CPO testing can be completed, covering both electrical and optical parts. Advantest is very strong in the electrical testing portion; whether through integration or self-development, they can cover testing for switches, CPUs, GPUs, etc.

Regarding PIC testing, there are currently two solutions: the double-sided testing solution from the Teradyne and ficonTec collaboration, and the single-sided testing solution from Advantest and FormFactor. What is the difference between the two?

The Teradyne and ficonTec solution is an all-in-one machine performed on a single wafer stage. In contrast, the Advantest and FormFactor solution consists of two pieces of equipment. CPO Chiplet designs usually have optics (PIC) on one side and electronics on the other. An all-in-one solution requires flipping the wafer to test optics and electronics separately. Advantest’s solution is separate, with electronics and optics tested on two independent machines; FormFactor, however, can test optics and electronics simultaneously on the same wafer stage.

Is there a difference in testing time and speed between these two solutions?

Overall, there isn't much difference in total testing time between the two solutions. If parallel testing can be achieved—testing optics and electronics at the same time—the time will be shorter. But if it is serial testing (testing optics then electronics), the total time is basically the same. The time required to flip the wafer is very short; the key is the time required for the test itself. If it is serial testing, the time difference is negligible whether it is on one machine or two; if parallel testing is possible, it will be faster.

From an investment perspective, which manufacturers are expected to benefit or develop faster?

According to TSMC, the preferred suppliers for CPO and PIC test benches are probe station manufacturers like FormFactor and MPI. The second tier consists of ATE solution providers like Advantest and Teradyne. The third choice is optical manufacturers. Therefore, FormFactor has the highest priority, followed by Teradyne and Advantest, and finally optical manufacturers like ficonTec.

On one hand, FormFactor has established a one-to-one binding with Keysight; Keysight’s overall test solution is only provided to FormFactor, while other customers can only buy individual instruments. FormFactor also specifically acquired an optical probe company, which implies they may have received clear instructions from top-tier customers to layout testing and coupling solutions in advance. Teradyne also acquired an optical testing company in 2025 to supplement its electrical testing solution. These acquisition moves indicate that manufacturers already have a tacit understanding with top-tier customers, actively addressing customer needs and driving the development of related technologies.

Expert Overview of Tower’s New Technologies and Business Evolution

Historically, the company's core business centered on the pluggable optical module sector, serving key clients like InnoLight. This foundation was built upon two primary pillars: PIC (Photonic Integrated Circuits) and EIC (Electronic Integrated Circuits). Notably, the company remains a globally significant player in the EIC domain.

Recent strategic expansions include a CPO (Co-Packaged Optics) Foundry Platform, which integrates the company's legacy 8-inch Silicon Photonics (SiPh) processes. To capitalize on the current SiPh market momentum, development is focused on two fronts:

* Capacity Expansion: Transitioning 8-inch production from California to facilities in Texas and Israel.

* Advanced Processing: Launching new 300mm SiGe and Silicon Photonics processes, primarily targeting transmitter-side components.

Regarding OCS (Optical Circuit Switching) discussed at OFC, Google is identified as the primary end-customer. This business represents a gradual scaling of existing technical expertise rather than a radical process shift.

Key Industry Highlights from OFC:

* The emergence of single-lane 400G technology.

* Increased attention on CPO as it nears the "computing power threshold," alongside domestic Chinese vendors launching NPO (Near-Packaged Optics) solutions.

* Debates over 400G technical routes: Thin-Film Lithium Niobate (TFLN) vs. EML vs. Silicon Photonics.

From a practitioner's view, OFC revealed an intense "arms race" in SiPh foundry services. Tower’s current growth is a result of long-term accumulation ("thick accumulation and thin hair"), allowing it to compete effectively against giants like GlobalFoundries (GF), TSMC, and STMicroelectronics by leveraging its integration of RF front-end processes (SOI, SiGe) and substrate epitaxy capabilities.

II. Financial Performance and Growth Structure

Revenue Breakdown and Market Outlook (2025–2026)

In Q4 2025, the Photonics business achieved record revenue of approximately $95 million (up from ~$80 million in Q3). Revenue guidance for 2026 remains highly optimistic due to 8-inch and 12-inch capacity expansions.

* Customer Base: InnoLight remains the largest client, followed by various vendors utilizing SiPh for optical modules.

* Technological Differentiation: Unlike GF or TSMC (which utilized 300mm 90nm/45nm/65nm nodes early on), Tower started with 200mm 0.18μm nodes nearly a decade ago. This allows Tower to offer a high price-performance ratio through niche technical "know-how," such as single-sided and heterogeneous integration.

* Market Positioning: Ranked 6th to 8th globally among foundries, Tower thrives as a specialty foundry (SOI, SiGe, SiPh, BCD, and high-end CIS).

Future Growth Drivers:

* Market Upgrades: The transition from 100G/400G to 800G and 1.6T. 2026 will be the year of 800G dominance, while 1.6T enters its first year of significant volume (est. 2 million units in 2025, primarily for NVIDIA).

* Architectural Shifts: The adoption of 200G per lane (e.g., 200G x 4 configurations) is becoming mainstream across both SiPh and EML routes.

III. Comparative Analysis: Silicon Photonics vs. EML

Advantages of SiPh in the 1.6T Era and Beyond

As the industry moves toward 1.6T and 3.2T, Silicon Photonics offers distinct advantages over traditional EML (Electro-absorption Modulated Laser) solutions:

IV. Market Penetration and Competitive Landscape

The Shift from EML/VCSEL to Silicon Photonics

While EML held over 60% of the market through 2025, the landscape is shifting rapidly. Using InnoLight as a bellwether:

* Early 2025: Product mix was roughly 30% SiPh, 30% EML, 40% VCSEL.

* Late 2025: Shifted to nearly 60-65% SiPh, 30% EML, 10% VCSEL.

This shift is driven by EML supply shortages (InP constraints and CW light source scarcity), pushing EML lead times into mid-2026. By 2026, SiPh is expected to reach market parity with EML (50/50 split).

V. 1.6T Market Dynamics and Ecosystem Playbook

The Battle Between CPO, NPO, and LPO

The 1.6T market remains in its infancy, driven by NVIDIA and Google. Massive scaling is expected in 2027.

* EML Coexistence: EML will not be replaced entirely; it remains superior for long-haul transmission (>2km) where SiPh suffers from high optical loss.

* LPO (Linear Drive Pluggable Optics): A current "hotspot" that removes the high-power/high-cost DSP. This reduces costs by 30-40% but increases requirements for Drivers and TIAs, effectively boosting EIC component usage.

* CPO Constraints: Cloud Service Providers (CSPs) are hesitant about CPO due to standardization, heat dissipation, and yield issues. CSPs fear losing "bargaining power" and supply chain flexibility with highly integrated, non-modular CPO designs.

VI. Global vs. Domestic (China) Trends

Divergent Paths in Optical Interconnects

* Overseas: Driven by aggressive M&A (NVIDIA, Marvell, Broadcom) to consolidate the supply chain and accelerate 1.6T/3.2T deployment.

* China: Limited by computing power ceilings (demand peaks at 400G), domestic firms are attempting to "overtake on the curve" by aggressively pushing CPO, NPO, and LPO. The number of Chinese firms in the SiPh space has surged, though they still face gaps in high-end light sources and InP materials.

VII. NVIDIA’s Strategic Moat

Dual-Pathing and Supply Chain Orchestration

NVIDIA’s $2 billion investments in Lumentum and Coherent signal that integrated lasers (especially InP) are the critical bottleneck.

* Lumentum: The "technical master" for advanced laser solutions.

* Coherent: The "broad-scale" provider across multiple segments.

NVIDIA is also diversifying its foundry partners. Beyond TSMC, it began collaborating with Tower and GlobalFoundries in early 2026 to leverage their expertise in heterogeneous and monolithic integration, ensuring it is not solely dependent on a single provider or technical route.

VIII. Tower’s Core Value Proposition

Sustainable Competitive Advantages

* Specialty Process Leadership: Deep expertise in SOI-based epitaxy and mature nodes.

* Multi-Platform Capability: Simultaneously offering 200mm (cost-optimized) and 300mm (high-performance) solutions.

* Heterogeneous Integration: One of only three companies globally capable of Indium Phosphide (InP) heterogeneous integration on silicon.

* Geopolitical Resilience: Foundries in the US, Israel, and Japan provide high supply chain flexibility.

Future Revenue Target:

Tower is well-positioned to reach an annualized revenue of $3-4 billion by Q1 2027, driven by the Data Center (SiPh/SiGe) and Power Management (BCD high-voltage) sectors. While competition from TSMC and GF is fierce, Tower’s unique ability to integrate PIC and EIC on a single platform remains a difficult-to-replicate advantage.

## 1. Deployment timeline for CPO

Question ([00:25:09]):

> *“When will we see the massive deployment of CPO?”*

Answer (Gilad) :

- Deployments of co-packaged optics (CPO) start this year .

- NVIDIA announced three partners that will be among the first to deploy Quantum‑X InfiniBand with CPO :

- CoreWeave

- Lambda

- Texas Advanced Computing Center (TACC)

- As Spectrum‑X systems start shipping, we will see more AI and supercomputing deployments using CPO.

---

## 2. Reliability issues with CPO

Question ([00:26:21]):

> *“Is CPO reliability issue solved now? What was the main reliability problem and how was it solved?”*

Answer (Gilad) :

- In pluggable optics , reliability issues often come from human touch :

- Modules are external, need cleaning before installation.

- Installing or replacing one module can physically disturb others .

- Exposure to dust and handling lowers resiliency.

- With co‑packaged optics :

- The optical engine is inside the switch package , together with the switch ASIC.

- It is liquid‑cooled , sealed, and not subject to human touch in the data center.

- NVIDIA and partners built a manufacturing and test process so the entire system (not just individual components) is 100% tested and validated before deployment.

- Result: Much higher reliability and resiliency than pluggables; CPO reliability concerns are effectively addressed.

---

## 3. Collaboration with TSMC and new requirements

Question ([00:28:20]):

> *“Regarding the new technology of CPO, what new requirement did you use in your collaboration with TSMC?”*

Answer (Gilad) :

Key points of the collaboration and innovations:

- Packaging / co‑packaging process with TSMC :

- Needed a reliable, fully testable packaging flow suitable for mass production .

- Earlier CPO attempts couldn’t achieve full validation and system‑level reliability.

- Optical engine design :

- Previous approaches used large MCM‑based optical engines , which don’t scale well to large‑radix switches .

- NVIDIA designed a smaller optical engine (based on microring modulation ) that supports large radix and high‑density AI fabrics.

- Other innovations :

- Fiber alignment and fiber array design inside the switch system.

- Integration of laser sources , including high‑power lasers that:

- Provide required performance.

- Reduce the number of lasers needed for dense optical infrastructure.

Overall, there is innovation across packaging, optical engines, fiber coupling, and laser design , with TSMC’s process as a critical enabler.

---

## 4. Flexibility vs pluggable optics (short‑range vs long‑range)

Question ([00:31:57]):

> *Paraphrased:* Pluggable optics let us build networks *port by port* and choose MMF short‑range or SMF long‑range modules depending on cost and distance.

> *“Are co‑packaged optics going to be that flexible? Can you order a CPO switch as either long‑range or short‑range?”*

Answer (Gilad) :

- With pluggables , you can choose:

- Multi‑mode vs single‑mode fiber ,

- DR, FR, longer reach , etc., per port/application.

- With CPO , you choose a specific optical technology up front for the switch. So flexibility moves to choosing the right CPO variant , not per‑port modules.

- NVIDIA’s Spectrum‑X photonics CPO is designed to:

- Cover all distances within a data center ,

- And also support building‑to‑building connectivity on the same campus .

- Because of that, you don’t need multiple transceiver types for intra‑DC and campus distances— one CPO technology replaces a broad range of pluggables .

- For very long‑distance data center‑to‑data center (scale‑across) , you still connect to external transceivers .

- CPO also offers up to ~5× power reduction compared to pluggables while covering the necessary reach.

---

## 5. Why might hyperscalers be cautious about CPO?

Question ([00:35:19]):

> *“What are the key factors that could make hyperscalers cautious or slower in adopting CPO, despite its potential differences in bandwidth, density and power efficiency?”*

Answer (Gilad) :

- First, CPO advantages:

- Lower power → more compute capacity within the same power budget.

- Higher resiliency and fewer link flaps → better uptime and time to first interrupt .

- Higher density and performance for AI.

- Potential reasons for caution (and NVIDIA’s answers):

1. Fear of frequent switch replacement

- With pluggables, modules sometimes fail and are replaced individually.

- Concern: if optics are inside the switch, do you now replace whole switches more often?

- Answer:

- Pluggable failures are often caused by human handling and exposure.

- In CPO, optics are sealed inside the system , not handled in the field , and system‑level tested , giving resiliency comparable to a pluggable switch without optics , often better.

2. Loss of per‑port flexibility

- With pluggables, you can mix MMF/SMF, short/long reach.

- CPO seems “fixed.”

- Answer: NVIDIA’s CPO design covers full DC distance and intra‑campus building‑to‑building . So one CPO technology replaces many transceiver options , while reducing power and increasing resiliency .

- Given these mitigations, Gilad expects strong adoption of CPO by hyperscalers.

---

## 6. Pay‑as‑you‑go vs upfront cost with CPO

Question ([00:40:29]):

> *“One of the huge benefits of pluggable optics was the pay‑as‑you‑go model – you only ordered as many modules as you needed, instead of paying everything up front. Does CPO drive up the initial purchase price to a maxed‑out price from the start?”*

Answer (Gilad) :

- Pay‑as‑you‑go with pluggables makes sense for traditional data centers where:

- Many switches are not fully utilized ,

- You might populate only some ports initially.

- AI supercomputers are different:

- Topology is fully optimized ,

- Every switch is designed to be fully utilized (full radix) ,

- Reference architectures assume all links are used for large GPU clusters.

- In that AI context:

- You would end up buying all the transceivers anyway to fully populate the fabrics.

- Integrating optics via CPO actually reduces overall cost :

- Lower capex vs separate switches + full set of transceivers.

- Lower opex via substantial power savings .

- Plus better resiliency and time‑to‑first‑interrupt .

- So for AI fabrics, CPO is positioned as a win on cost, power, and reliability , even though it isn’t “pay‑as‑you‑go” in the old pluggable sense.

---

## 7. Future innovation and process improvement (next‑gen products)

Question ([00:42:59]):

> *“Do and where do you see the role for innovation and process improvement for next‑gen products?”*

Answer (Gilad) :

- The industry now follows an annual cadence for:

- GPUs, CPUs, switches, superNICs , and data center designs .

- Current CPO generation focuses on:

- 200G per lane (200G SerDes),

- Maximum power savings ,

- High resiliency ,

- Enabling large‑radix switches for AI factories (Spectrum‑X Ethernet and Quantum‑X InfiniBand).

- Next‑gen innovation areas:

- Even larger radix switches → more ports per switch.

- Higher density of optical connectivity and data throughput.

- New/better methods to connect fiber into the switch .

- Denser, fully liquid‑cooled racks so GPU + network can both scale in power‑efficient ways.

- Overall: improving the density of the switch , the rack , and the entire data center generation over generation.

---

## 8. Liquid cooling compatibility with DGX/BGX racks

Question ([00:46:31]):

> *“The liquid cooled… is the liquid cooling compatible with the BGX/DGX racks?”*

Answer (Gilad) :

- NVIDIA designs the data center as one integrated system :

- The DGX (compute) unit is the ‘computer’ ,

- The network (Spectrum‑X, Quantum‑X) is designed to fit that same rack and cooling model .

- The same rack‑level liquid‑cooling design used for compute servers is also used for the switch/network infrastructure , making:

- Deployment, installation, and management easier and more uniform .

- At the same time:

- Spectrum‑X Ethernet is a flexible platform .

- NVIDIA works with large manufacturing partners to build variants for different CSPs/customers , tailored to their rack and cooling designs .

- Supports multiple operating systems , making it adaptable to varied data center environments.

• There is a saying that AMD’s server CPU capacity for the entire year is already sold out? Is this normal compared to previous years? What is the reason for this? AMD has internally notified that all server CPU capacity for 2026 is already sold out. If customers need to add new capacity, they can only wait for further confirmation from AMD. Compared to previous years, this situation is different. In the past, CPU sell-outs would not occur this early; although the ordering cycle is usually a year in advance, the following year is generally not this tight. Manufacturers usually have some inventory and flexible quantities to meet additional demand. Occasionally, some tightness would occur in the third or fourth quarters, but this was mainly due to concentrated order deliveries; a sell-out at the very beginning of the year has never happened before, making this a brand-new phenomenon.

• What are the specific causes for this? There are several reasons. First, the demand for AI inference business is growing; whether using third-party inference cards or NVIDIA inference cards, CPUs are required for business scheduling and management, including the loading of data and models. The explosion of the AI inference business only began in the second half of 2025, and many computing service center manufacturers did not anticipate such a high growth rate. They believed high-speed AI implementation and explosive growth would happen in 2026 or 2027, so it was not predicted for 2025, and thus no advance orders were placed with AMD or Intel for this specific demand.

• The second reason is the replacement cycle. During the pandemic, demand for home offices and cloud services surged. Starting from 2020, there was a massive surge in Intel and AMD CPUs for desktops, laptops, and servers. For cloud service providers, equipment enters a replacement cycle after about three years due to aging and the fact that its cost-performance ratio is inferior to new-generation products. Therefore, 2025 and 2026 are precisely the entry points for this update cycle, bringing new demand.

• The impact of Agentic AI. Furthermore, the recent rapid push by manufacturers like NVIDIA for Agentic AI has brought strong demand for general-purpose CPU servers. During the AI model inference process, a large number of APIs and external applications need to be called, which can only rely on traditional CPUs for loading, calling, and execution, as GPUs cannot complete these tasks, leading to rapid growth in CPU demand.

• Conservative forecasting. The superposition of these factors led manufacturers to be conservative in their 2025 forecasts for 2026 business growth, failing to provide strong demand predictions to Intel and AMD. When demand grew at the end of 2025, manufacturers had no additional capacity guarantees, leading to a sudden shortage where all orders were filled and even the original flexible capacity was occupied.

• Has Intel also experienced a server CPU sell-out phenomenon this year (2026)? Intel has experienced a similar situation, primarily driven by demand growth. In 2025, users did not provide strong demand forecasts. Additionally, Intel and AMD are facing issues with desktop capacity; whether it is mature capacity or the most advanced capacity, a certain ramp-up time is required. For example, Intel’s 18A and 20A, and AMD’s 2nm and 3nm processes, are all facing very tight capacity. Although there is new demand, it is difficult for manufacturers to find additional capacity to meet it, creating a tight situation. Intel is currently unable to meet the growth in CPU demand, and capacity is very tight.

• Will manufacturers resist updating too quickly under additional burdens like system updates? Product warranty agreements are generally three years, at most five years. Within this cycle, manufacturers conduct comprehensive evaluations. Cloud providers are more concerned with how many vCPUs a single device can virtualize and if it can provide efficient, economical services. Usually, after three years, equipment enters an aging phase with higher failure rates and maintenance costs. Performance also lags behind new-generation products. In this case, cloud providers find that old equipment no longer meets requirements, sell it for residual value, and buy the latest generation to improve cost-performance. This is industry practice; phased-out machines may flow to small users like private clouds or startups.

• Is there talk of Intel and AMD considering a 10-15% price hike for CPUs? Implementation timing? Will it be across the board or only for the latest generations? Both AMD and Intel have relayed price hike information, but the specific timing is not yet determined. It is expected that in the first quarter, prices will be adjusted based on supply and demand gaps. The predicted hike is no more than 15%. This is mainly concentrated in Q1. Both companies are still evaluating based on capacity and customer demand. The hike is not across the board; for example, Intel is only starting to raise prices for the latest Granite Rapids and Diamond Rapids generations. AMD may propose hikes for the Turin and Venice generations, while previous generations are expected to stay close to original prices or see minor fluctuations.

• What is the ratio of new to old generation shipments for Intel this year (2026)? Will the demand for Agentic AI lead to a higher proportion of high-end units? How does this compare to previous years? Typically, latest generation products only account for about 10% of shipments in their first year, with mainstream products at 60% and older products at 20%. While there is new demand for CPUs, it is currently unclear. The relationship between Identity models and the matching of general-purpose vs. GPU servers is not clear, and currently popular models lack clear evaluation standards for CPU performance. Since models are still developing, there is no significant substitution demand for CPUs yet. The latest CPU share remains at 10%. Mainstream CPUs bear the primary demand because of better cost-performance. Whether CPUs like Granite Rapids will become mainstream for Agentic AI remains to be seen.

• Will stronger Agentic AI demand drive more demand for P-core series? Where will E-cores be used? It is expected that E-cores are just a transitional generation, and next-generation products will fully transition to P-cores, including the desktop processor Nova Lake. P-cores will see greater demand as Agentic AI emphasizes CPU capabilities in task processing and scheduling. E-cores have a “discount” in this area and require extra optimization, which is not ideal for many users. While E-cores reduce power consumption, P-cores are more suitable for focused AI business.

• Regarding AIDC front-end network expansion, has it significantly lagged behind back-end networks over the past two years? Will expansion speed surpass the back-end this year or next? Surpassing is unlikely. Front-end networks handle general-purpose server access, storage, and management—roles significantly less prominent than back-end networks, which directly affect model inference and training efficiency. In 2026, front-end networks will grow rapidly—NVIDIA emphasized this in the Rubin release with BlueField SmartNICs for storage access—but the scale is still relatively small. Front-end bandwidth (400G/800G) lags behind back-end networks (starting from 800G, moving toward 1.6T). Front-end demand is expected to increase by at least 50% this year, but will not exceed the back-end.

• How do you judge the shipment growth expectations for the AMD EPYC series? And the market share outlook for AMD in the server CPU market this year? This year (2026), AMD EPYC shipments will continue to grow. Historically, EPYC’s share was around 20-24%. Customers prioritize stability and compatibility, where EPYC still has a slight performance disadvantage compared to Intel in database access. However, EPYC is 15-30% cheaper. It is estimated that by 2026, AMD’s server CPU shipments will peak at a market share of about 35%, while Intel’s may shrink. In terms of revenue, AMD is expected to occupy nearly half of the market because its CPU specifications for the same generation are higher than Intel’s, leading to higher prices. AMD’s market share is expected to grow by 2-3 percentage points per quarter this year.

• What is the proportion of single-socket servers in traditional data centers? Is there a trend of dual-socket to single-socket over the next 2 years? Main drivers? Single-socket servers have always held a high proportion, being competent for any scenario not requiring extremely high stability. In cloud business, they account for about 60-66% of market share due to lower design costs and better stability/cost balance. There is a trend of conversion from dual-socket to single-socket, which may continue to rise. However, dual-socket remains mainstream for databases and high storage demand, while single-socket dominates traditional Web and file access.

• How do you judge global general-purpose server shipments this year (2026)? What are the main driving factors for growth? The Chinese market historically accounts for about 25-30% of global servers. This year (2026), China’s shipments are nearly 4 million units, suggesting global shipments of about 12-16 million units. The growth rate is about 10-15%, faster than the historical 7-8%. This is driven by AI inference demand, the replacement cycle for pandemic-era servers, and potential future demand for traditional CPU servers. Overall, CPU demand growth this year is 2-5 percentage points higher than usual.

• AWS recently raised Capacity Block prices by 15%; is this due to hardware cost pass-through or excessive AI demand? The main reason is excessive AI demand. AWS Capacity Block has mainly targeted H200 cards, which are preferred by major model manufacturers like OpenAI and xAI. H200 demand has grown rapidly, leading to tight supply. Secondly, purchasing new H200 equipment faces capacity and price pressure from NVIDIA. Additionally, rising costs for CPUs, memory, and storage have been partly passed on to new users. AWS has only raised prices for Capacity Blocks and not yet for other long-term contracts.

• Will AWS long-term contracts also raise prices soon? Will AI server leasing fees from other top-tier CSPs also rise? The possibility of long-term contract price hikes in the near term is low. Current rent for H200 cards is about $4.5 per hour, while Blackwell is near $12. Once Blackwell becomes mainstream, demand for H-series price hikes will decrease. The trend depends on the Blackwell launch and its large-scale performance; if it meets expectations, widespread price hikes are unlikely.

• Timing for the large-scale launch of B-cards (Blackwell) in the rental market? Large-scale launch is expected in late 2Q26 for B200 and 300 (including GB200/300). Recently, B300 series machines have begun delivery to some cloud providers, but they require 2-3 months for online setup and debugging.

• Have you seen CSPs contacting crypto mines more recently? Will the transformation speed of mines accelerate or slow down? Mine transformation is moving very fast, with about 80% of mines in contact with AI manufacturers. Mines have long-term power contracts that CSPs desperately need. Furthermore, mining profits are low, whereas AI computing centers offer 30-35% profit margins. Transitioning to AIDCs allows for various cooperation models while maintaining control over power resources.

• Zuckerberg announced Meta Compute’s energy and computing expansion plans last week; what are the expansion nodes and rhythm? Meta Compute mainly cooperates with power resource manufacturers in phases, particularly in nuclear energy. The project starts in 2026, aiming for $500-600 billion in power investment by 2028 to satisfy deployment needs for NVIDIA, TPU, and AMD products. The goal is to solve Meta’s power supply shortage.

• Regarding the H200, can domestic (Chinese) customers still get stock? H200 approvals are currently halted, and large-scale imports before March are very unlikely. Internet companies are in a wait-and-see state, with some considering expanding overseas compliant deployment plans. Some reasons also stem from domestic chip manufacturers calling for the protection of domestic brands.

(a bit sensitive, have to put behind paywall)

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• TAM $3-4T

  • Total AI infrastructure spending projected at $3-4T annually by 2030, an increase from the prior $1T forecast.

  • Company can address $35B, or 60-70%, of every $50B spent on AI infrastructure per gigawatt.

• Demand & Bookings

  • GB300 platform ramping very aggressively with incredible demand and 50% greater token generation.

  • Continued H100/H200 demand from customers prioritizing quicker time-to-market and fewer qualification delays.

  • Strong data center visibility extends into next year and remains unchanged.

  • Expect rack output to accelerate into Q3 with healthy growth in both Compute and Networking.

• Supply & Constraints: Demand expected to exceed supply through next year, with timing of a catch-up still unclear.

• China: Potential to ship $2-5B of H20 to China in Q3 if geopolitical issues recede.

• Margin & Opex

  • Committed to mid-70s gross margin target, irrespective of potential China revenue. [8]

  • H20 margins are around the corporate average. [8]

  • Operating expense as a percentage of revenue expected to be in the high 30s for the year, consistent with strong revenue growth. [9]

Questions & Answers:

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Guidance & Financials

• Q3 2025 revenue guidance up by "~$1B" sequentially, driven by MI355 ramp [1]

• Long-term GPU margins expected to converge with CPU business levels [2]

• GPU gross margins are currently below normalized levels but are expected to expand over time [2]

• Strategic goal is to maximize gross margin dollars, not percentage [3]

MI355 & MI455 Ramp

• Reports of MI355 thermal or ramp issues are false; production began ahead of schedule [4]

• Demand outstripping supply; existing customers have backlogs through 1H26, new customers constrained by supply [5]

• Customers validating 10,000 GPU scale on MI355 now to ensure smooth MI455 launch [6]

• MI455 inflection driven by customer confidence; multi-$10B cluster decisions made 12-18 months in advance [7]

Competitive Positioning

• Customers indicate AMD has a "very compelling product on performance/TCO" vs. NVIDIA's Vera Rubin timeline [8]

• Response to NVIDIA's CUDA moat is ROCm maturity, networking flexibility, and customer desire for multi-vendor options [9]

• Value proposition vs. NVIDIA centers on performance per TCO, openness, and roadmap providing an alternative to vendor lock-in [10]

Product & Strategy

• Share gain strategy involves stepwise product expansion (MI300 to MI450) to cover "pretty much everything" [11]

• GPU lead times are ~9-10 months; conversations for massive 500MW-1GW scale AI clusters are already happening [12]

• No current incentive to replace x86 with ARM in data center GPU+CPU combos [13]

Questions & Answers：

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• MI355 margins under corporate margin but better than 325

• Some speculation on MI350X ASP is inaccurate; BOM up >50%, ASP up more than that.

• Client unit growth in Q2 entirely from desktop; OEM notebook units flat YoY to avoid inventory build and pull-ins

• Executing to avoid partner readiness and supply chain issues Nvidia faced during GB200 ramp while acknowledging complexity of execution.

• At earnings time, no licenses approved (6.5 weeks into 13-week order cycle); first licenses arrived late Friday/early Saturday post-earnings.

• $800M inventory write-down: small finished goods, majority WIP at various stages, plus supplier purchase commitments avoided.

• Helios / MI400 series will introduce coherency scale-up to 72 GPUs in 1st gen; future scale beyond 72 TBD.

• Helios will run UAL tunneled over Ethernet on Broadcom Tomahawk switches (similar to existing server implementations).

• Post-2027 (MI500 series) options:

Details:

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• capex: $120 B is “the right way to think about it” and offered no pushback on upside.

• No explicit OpenAI contract calls this quarter. Strength came from enterprise contracts in non-AI segments.

• Incremental capacity spend isn’t just GPUs but also data-center space and power infrastructure.

• 100 M “Copilot” disclosure include of GitHub Copilot, Microsoft 365 Commercial Copilot, consumer Copilot, and M365 Chat Copilot.

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• US $7.5k credit: Tesla likely “eats” ~$3k–$5k/unit to hold volume

• Estimated 2–4% margin pressure seen as more realistic vs the 100 bps consensus cut

• 24’ growth guidance pulled: volume down; 25’: to maintain volume

• “Model Q”: Essentially a stripped‑down Model Y

• Robo-taxi datapoints: repeatedly said “don’t know / not going to say” on fleet size, rides/day, $/ride, profitability

Details are as follows:

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1. Capex is not entirely cloud‑directed; other businesses are scaling alongside cloud.

2. Cloud backlog expanded $16 bn QoQ, signaling visibility that supports continued investment.

3. Both TPU and GPU accelerators seeing “stronger demand across the board.”

4. Depreciation: Server vs DC mix 2/3 vs. 1/3, and margins could be down in '27

Q&A Details are as follows:

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